8- and 4-Channel, 卤3 x VREF Multirange Inputs, Serial 14-Bit ADCs 18 Maxim Integrated D" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� MAX1033EUP+
寤犲晢锛� Maxim Integrated Products
鏂囦欢闋�(y猫)鏁�(sh霉)锛� 10/32闋�(y猫)
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC ADC 14BIT SER 115KSPS 20TSSOP
鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 74
浣嶆暩(sh霉)锛� 14
閲囨ǎ鐜囷紙姣忕锛夛細 115k
鏁�(sh霉)鎿�(j霉)鎺ュ彛锛� MICROWIRE?锛屼覆琛�锛孲PI?
杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩細 1
鍔熺巼鑰楁暎锛堟渶澶э級锛� 879mW
闆诲闆绘簮锛� 妯℃摤鍜屾暩(sh霉)瀛�
宸ヤ綔婧害锛� -40°C ~ 85°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 20-TSSOP锛�0.173"锛�4.40mm 瀵級
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 20-TSSOP
鍖呰锛� 绠′欢
杓稿叆鏁�(sh霉)鐩拰椤炲瀷锛� 4 鍊�(g猫)鍠锛屽柈妤�锛�4 鍊�(g猫)鍠锛岄洐妤�锛�2 鍊�(g猫)宸垎锛屽柈妤�锛�2 鍊�(g猫)宸垎锛岄洐妤�
MAX1032/MAX1033
8- and 4-Channel, 卤3 x VREF
Multirange Inputs, Serial 14-Bit ADCs
18
Maxim Integrated
Differential Common-Mode Range
The MAX1032/MAX1033 differential common-mode
range (VCMDR) must remain within -14V to +9V to
obtain valid conversion results. The differential com-
mon-mode range is defined as:
In addition to the common-mode input voltage limita-
tions, each individual analog input must be limited to
卤16.5V with respect to AGND1.
The range-select bits R[2:0] in the analog input config-
uration bytes determine the full-scale range for the cor-
responding channel (Tables 2 and 6). Figures 9, 10,
and 11 show the valid analog input voltage ranges for
the MAX1032/MAX1033 when operating with FSR = 卤3
x VREF/2, FSR = 卤3 x VREF, and FSR = 卤6 x VREF,
respectively. The shaded area contains the valid com-
mon-mode voltage ranges that support the entire FSR.
V
CH
CMDR
_
=
+
() + ()
2
Table 3. Input Data Word Formats
DATA BIT
OPERATION
D7
(START)
D6
D5
D4
D3
D2
D1
D0
Conversion-Start Byte
(Tables 4 and 5)
1
C2
C1
C0
000
0
Analog-Input Configuration Byte
(Table 2)
1
C2
C1
C0
DIF/
SGL
R2
R1
R0
Mode-Control Byte
(Table 7)
1
M2
M1
M0
100
0
Table 4. Channel Selection in Single-Ended Mode (DIF/
SGL = 0)
CHANNEL-SELECT BIT
CHANNEL
C2
C1
C0
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
AGND1
000+
-
001
+
-
010
+
-
011
+
-
100
+
-
101
+
-
110
+-
111
+-
Table 5. Channel Selection in True-Differential Mode (DIF/
SGL = 1)
CHANNEL-SELECT BIT
CHANNEL
C2
C1
C0
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
AGND1
00
0
+
-
0
1
RESERVED
01
0
+
-
0
1
RESERVED
10
0
+
-
1
0
1
RESERVED
11
0
+-
1
RESERVED
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
MAX1035EUP+T IC ADC 14BIT SER 115KSPS 20TSSOP
MAX1036LEKA+T IC ADC 8BIT LP SERIAL SOT23-8
MAX1060AEEI+ IC ADC 10BIT 400KSPS 28-QSOP
MAX1062AEUB+ IC ADC 14BIT 200KSPS 10-UMAX
MAX1066BEUP+ IC ADC 14BIT 165KSPS 20TSSOP
鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
MAX1033EUP+ 鍔熻兘鎻忚堪:妯℃暩(sh霉)杞�(zhu菐n)鎻涘櫒 - ADC 4Ch +/-12V Multi Inputs Serial 14-Bit RoHS:鍚� 鍒堕€犲晢:Texas Instruments 閫氶亾鏁�(sh霉)閲�:2 绲�(ji茅)妲�(g貌u):Sigma-Delta 杞�(zhu菐n)鎻涢€熺巼:125 SPs to 8 KSPs 鍒嗚鲸鐜�:24 bit 杓稿叆椤炲瀷:Differential 淇″櫔姣�:107 dB 鎺ュ彛椤炲瀷:SPI 宸ヤ綔闆绘簮闆诲:1.7 V to 3.6 V, 2.7 V to 5.25 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:VQFN-32
MAX1033EUP+T 鍔熻兘鎻忚堪:妯℃暩(sh霉)杞�(zhu菐n)鎻涘櫒 - ADC 4Ch +/-12V Multi Inputs Serial 14-Bit RoHS:鍚� 鍒堕€犲晢:Texas Instruments 閫氶亾鏁�(sh霉)閲�:2 绲�(ji茅)妲�(g貌u):Sigma-Delta 杞�(zhu菐n)鎻涢€熺巼:125 SPs to 8 KSPs 鍒嗚鲸鐜�:24 bit 杓稿叆椤炲瀷:Differential 淇″櫔姣�:107 dB 鎺ュ彛椤炲瀷:SPI 宸ヤ綔闆绘簮闆诲:1.7 V to 3.6 V, 2.7 V to 5.25 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:VQFN-32
MAX1034 鍒堕€犲晢:MAXIM 鍒堕€犲晢鍏ㄧū:Maxim Integrated Products 鍔熻兘鎻忚堪:8-/4-Channel, 銆怴REF Multirange Inputs, Serial 14-Bit ADCs
MAX1034_12 鍒堕€犲晢:MAXIM 鍒堕€犲晢鍏ㄧū:Maxim Integrated Products 鍔熻兘鎻忚堪:8-/4-Channel, ?卤VREF Multirange Inputs,Serial 14-Bit ADCs
MAX1034BEUG+ 鍔熻兘鎻忚堪:妯℃暩(sh霉)杞�(zhu菐n)鎻涘櫒 - ADC 8-/4-Channel, Multirange Inputs, RoHS:鍚� 鍒堕€犲晢:Texas Instruments 閫氶亾鏁�(sh霉)閲�:2 绲�(ji茅)妲�(g貌u):Sigma-Delta 杞�(zhu菐n)鎻涢€熺巼:125 SPs to 8 KSPs 鍒嗚鲸鐜�:24 bit 杓稿叆椤炲瀷:Differential 淇″櫔姣�:107 dB 鎺ュ彛椤炲瀷:SPI 宸ヤ綔闆绘簮闆诲:1.7 V to 3.6 V, 2.7 V to 5.25 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:VQFN-32