參數(shù)資料
型號(hào): MAX1003CAX
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: ADC
英文描述: Low-Power, 90Msps, Dual 6-Bit ADC
中文描述: DUAL 1-CH 6-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDSO36
封裝: 0.300 INCH, 0.80 MM PITCH, SSOP-36
文件頁數(shù): 6/12頁
文件大?。?/td> 115K
代理商: MAX1003CAX
M
Single-ended and differential AC-coupled input circuits
are shown in Figures 2 and 3. Each of the amplifier
inputs is internally biased to a 2.35V reference through
a 20k
resistor, eliminating external DC bias circuits. A
series 0.1μF capacitor is required at each amplifier
input for AC-coupled signals.
When operating with AC-coupled inputs, the input
amplifiers’ DC offset voltage is nulled to within ±1/2LSB
by an on-chip offset-correction amplifier. An external
compensation capacitor is required to set the dominant
pole of the offset-correction amplifier’s frequency
response (Figures 2 and 3). The compensation capaci-
tor will determine the low-frequency corner of the ana-
log input response according to the following formula:
f
c
= 1 / (0.1 x C)
where C is the value of the compensation capacitor in
μF, and f
c
is the corner frequency in Hz.
Low-Power, 90Msps, Dual 6-Bit ADC
6
_______________________________________________________________________________________
0
DIV
90Msps
DATA
BUFFER
TANK
MODCTL
CAR
SYNTHESIZER
FIN
IIN
AGC
CLK IN
DSP
QIN
ADC CLOCK
6 BITS
TANK
LO
TSA5055
or EQUIV.
90
MOD GND
AGC
IOUT
QOUT
V
CC
FROM TANK VOLTAGE
VARACTOR-TUNED
PRESELECTION FILTER
EXTERNAL
VCO
OR
OR
KU BAND
75
CABLE
950MHz TO2150MHz
F-CONNECTOR
INPUT
MAX2102
MAX1003
DATA
BUFFER
LO
RFIN
RFIN
LNB
6 BITS
Figure 1. Commercial Satellite Receiver System
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