參數(shù)資料
型號(hào): MAX038EPP
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 運(yùn)動(dòng)控制電子
英文描述: ER 7C 5#16 2#12 PIN PLUG
中文描述: SQUARE; TRIANGULAR; SINE; SAWTOOTH; PULSE, 20 MHz, WAVEFORM GENERATION, PDIP20
封裝: PLASTIC, DIP-20
文件頁數(shù): 13/16頁
文件大?。?/td> 203K
代理商: MAX038EPP
PDO is a rectangular current-pulse train, alternating
between 0μA and 500μA. It has a 50% duty cycle when
the MAX038 output and PDI are in phase-quadrature
(90° out of phase). The duty cycle approaches 100%
as the phase difference approaches 180° and con-
versely, approaches 0% as the phase difference
approaches 0°. The gain of the phase detector (K
D
)
can be expressed as:
K
D
= 0.318 x R
PD
(volts/radian)
where R
PD
= phase-detector gain-setting resistor.
When the loop is in lock, the input signals to the phase
detector are in approximate phase quadrature, the duty
cycle is 50%, and the average current at PDO is 250μA
(the current sink of FADJ ). This current is divided
between FADJ and R
PD
; 250μA always goes into FADJ
and any difference current is developed across R
PD
,
creating V
FADJ
(both polarities). For example, as the
phase difference increases, PDO duty cycle increases,
the average current increases, and the voltage on R
PD
(and V
FADJ
) becomes more positive. This in turn
decreases the oscillator frequency, reducing the phase
difference, thus maintaining phase lock. The higher
R
PD
is, the greater V
FADJ
is for a given phase differ-
ence; in other words, the greater the loop gain, the less
the capture range. The current from PDO must also
[16]
charge C
PD
, so the rate at which V
FADJ
changes (the
loop bandwidth) is inversely proportional to C
PD
.
The phase error (deviation from phase quadrature)
depends on the open-loop gain of the PLL and the ini-
tial frequency deviation of the oscillator from the exter-
nal signal source. The oscillator conversion gain (K
o
) is:
K
O
=
ω
o ÷
VF
ADJ
which, from equation [6] is:
K
O
= 3.43 x
ω
o
(radians/sec)
The loop gain of the PLL system (K
V
) is:
K
V
= K
D
x K
O
where:
K
D
= detector gain
K
O
= oscillator gain.
With a loop filter having a response F(s), the open-loop
transfer function, T(s), is:
T(s) = K
D
x K
O
x F(s) ÷ s
Using linear feedback analysis techniques, the closed-
loop transfer characteristic, H(s), can be related to the
open-loop transfer function as follows:
H(s) = T(s) ÷ [1+ T(s)]
The transient performance and the frequency response
of the PLL depends on the choice of the filter charac-
teristic, F(s).
When the MAX038 internal phase detector is not used,
PDI and PDO should be connected to GND.
[17]
[18]
[19]
[20]
[21]
External Phase Detectors
External phase detectors may be used instead of the
internal phase detector. The external phase detector
shown in Figure 4 duplicates the action of the MAX038’s
internal phase detector, but the optional ÷N circuit can
be placed between the SYNC output and the phase
detector in applications requiring synchronizing to an
exact multiple of the external oscillator. The resistor net-
work consisting of R4, R5, and R6 sets the sync range,
while capacitor C4 sets the capture range. Note that
this type of phase detector (with or without the ÷N cir-
cuit) locks onto harmonics of the external oscillator as
well as the fundamental. With no external oscillator
input, this circuit can be unpredictable, depending on
the state of the external input DC level.
Figure 4 shows a frequency phase detector that locks
onto only the fundamental of the external oscillator.
With no external oscillator input, the output of the fre-
quency phase detector is a positive DC voltage, and
the oscillations are at the lowest frequency as set by
R4, R5, and R6.
M
High-Frequenc y Waveform Generator
______________________________________________________________________________________
13
MAX038
GND
9
COSC
12
A0
V-
18
11
2
6
GNDGND
15
DGND
GNDGND
5
8
10
7
1
13
3
FADJ
IIN
DADJ
REF
R
D
OUT
PDI
PDO
V+
A1
4
17
DV+
16
20
+5V -5V
C2
1μF
C1
1μF
CENTER
FREQUENCY
50
R
OUT
C
F
R
PD
C
PD
19
RF
OUTPUT
SYNC
14
EXTERNAL OSC INPUT
Figure 3. Phase-Locked Loop Using Internal Phase Detector
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