參數(shù)資料
型號(hào)： MAC7131CVF50R2
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 50 MHz, MICROCONTROLLER, PBGA208
封裝： MAPBGA-208
文件頁(yè)數(shù)： 9/60頁(yè)
文件大?。?/td> 760K
代理商： MAC7131CVF50R2
ElectricalCharacteristics
MAC7100 Microcontroller Family Hardware Specifications, Rev. 1.1.1
Preliminary
Freescale Semiconductor
17
3.8.2.1
Jitter Information
With each transition of the clock fCMP, the deviation from the reference clock fREF is measured and input
voltage to the VCO is adjusted accordingly. The adjustment is done continuously with no abrupt changes
in the clock output frequency. Noise, voltage, temperature and other factors cause slight variations in the
control loop resulting in a clock jitter. This jitter affects the real minimum and maximum clock periods as
illustrated in Figure 4. It is important to note that the pre-scaler used by timers and serial modules will
eliminate the effect of PLL jitter to a large extent.
Figure 4. Jitter Definitions
The relative deviation of tNOM is at its maximum for one clock period, and decreases towards zero for
larger number of clock periods (N). Thus, jitter is defined as:
Eqn. 15
For N
< 100, the following equation is a good fit for the maximum jitter:
Eqn. 16
Figure 5. Maximum Bus Clock Jitter Approximation
0
tMIN1
12
3
N–1
N
tNOM
tMAX1
tMIN(N)
tMAX(N)
JN
()
max 1
t
MAX N
()
Nt
NOM
--------------------
–1
t
MIN N
()
Nt
NOM
--------------------
–
,
=
JN
()
j
1
N
--------
j
2
+
=
01
5
10
20
15
N
J(N)
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