參數(shù)資料
型號： MAC7116MPV50XX
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： MICROCONTROLLER, PQFP144
封裝： 20 X 20 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, LQFP-144
文件頁數(shù)： 21/56頁
文件大小： 757K
代理商： MAC7116MPV50XX
MAC7100 Microcontroller Family Hardware Specifications, Rev. 1.2
Preliminary
Electrical Characteristics
Freescale Semiconductor
28
3.10.3 ATD Timing Specifications
Figure 10. ATD External Trigger Timing Diagram
Table 31. ATD External Trigger Timing Specifications
Num C
Parameter
Symbol
Min
Max
Unit
T1
D ETRIG Period (Level-Sensitive Trigger Mode)
TPERIOD 1 + NCONVn
1
NOTES:
1. NCONVn denotes 8- or 10-bit conversion time (refer to specifications N4, N5, P4 and P5). In order to achieve the
minimum period between conversions when using level-sensitive triggering, ETRIG must remain asserted this long.
—
fATDCLK Cycles
T2
D ETRIG Minimum Pulse Width
Edge-Sensitive Trigger Mode
Level-Sensitive Trigger Mode
tPW
1
2
—
fATDCLK Cycles
T3
D ETRIG Level Recovery 2
2. Time prior to the end of a conversion that ETRIG must be negated in order to prevent the start of another conversion.
tLR
1—
fATDCLK Cycles
T4
D Conversion Start Delay
tDLY
—2
fATDCLK Cycles
Level Sensitive
Low Active
Sequence
Conversion Activity
Complete Flag
Low Active
Sequence
Complete Flag
Conversion Activity
Level Sensitive
Falling Edge Active
Conversion Activity
Edge Sensitive
ETRIG
ANn_x
ETRIG
ASCIF
ANn_x
ETRIG
ASCIF
ANn_x
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:MAC7131
products
in
208
MAPBGA
packages
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