參數(shù)資料
型號: MA330011
廠商: Microchip Technology
文件頁數(shù): 142/199頁
文件大?。?/td> 0K
描述: MODULE DSPIC33 100P TO 100QFP
標(biāo)準(zhǔn)包裝: 1
附件類型: 插拔式模塊(PIM)- dsPIC33FJ256GP710
適用于相關(guān)產(chǎn)品: Explorer 16(DM240001 或 DM240002)
產(chǎn)品目錄頁面: 658 (CN2011-ZH PDF)
相關(guān)產(chǎn)品: DSPIC33FJ64GP710T-I/PT-ND - IC DSPIC MCU/DSP 64K 100TQFP
DSPIC33FJ64GP710T-I/PF-ND - IC DSPIC MCU/DSP 64K 100TQFP
DSPIC33FJ64GP310T-I/PT-ND - IC DSPIC MCU/DSP 64K 100TQFP
DSPIC33FJ64GP310T-I/PF-ND - IC DSPIC MCU/DSP 64K 100TQFP
DSPIC33FJ256GP510T-I/PT-ND - IC DSPIC MCU/DSP 256K 100TQFP
DSPIC33FJ256GP510T-I/PF-ND - IC DSPIC MCU/DSP 256K 100TQFP
DSPIC33FJ128GP310T-I/PT-ND - IC DSPIC MCU/DSP 128K 100TQFP
DSPIC33FJ128GP310T-I/PF-ND - IC DSPIC MCU/DSP 128K 100TQFP
DSPIC33FJ256GP710T-I/PT-ND - IC DSPIC MCU/DSP 256K 100TQFP
DSPIC33FJ256GP710T-I/PF-ND - IC DSPIC MCU/DSP 128K 100TQFP
更多...
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁當(dāng)前第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁第183頁第184頁第185頁第186頁第187頁第188頁第189頁第190頁第191頁第192頁第193頁第194頁第195頁第196頁第197頁第198頁第199頁
2007 Microchip Technology Inc.
Preliminary
DS70165E-page 45
dsPIC33F
3.2.5
X AND Y DATA SPACES
The core has two data spaces, X and Y. These data
spaces can be considered either separate (for some
DSP instructions), or as one unified linear address
range (for MCU instructions). The data spaces are
accessed using two Address Generation Units (AGUs)
and separate data paths. This feature allows certain
instructions to concurrently fetch two words from RAM,
thereby enabling efficient execution of DSP algorithms
such as Finite Impulse Response (FIR) filtering and
Fast Fourier Transform (FFT).
The X data space is used by all instructions and
supports all addressing modes. There are separate
read and write data buses for X data space. The X read
data bus is the read data path for all instructions that
view data space as combined X and Y address space.
It is also the X data prefetch path for the dual operand
DSP instructions (MAC class).
The Y data space is used in concert with the X data
space by the MAC class of instructions (CLR, ED,
EDAC, MAC, MOVSAC, MPY, MPY.N
and MSC) to
provide two concurrent data read paths.
Both the X and Y data spaces support Modulo
Addressing mode for all instructions, subject to
addressing mode restrictions. Bit-Reversed Addressing
mode is only supported for writes to X data space.
All data memory writes, including in DSP instructions,
view data space as combined X and Y address space.
The boundary between the X and Y data spaces is
device-dependent and is not user-programmable.
All effective addresses are 16 bits wide and point to
bytes within the data space. Therefore, the data space
address range is 64 Kbytes, or 32K words, though the
implemented memory locations vary by device.
3.2.6
DMA RAM
Every dsPIC33F device contains 2 Kbytes of dual ported
DMA RAM located at the end of Y data space. Memory
locations is part of Y data RAM and is in the DMA RAM
space are accessible simultaneously by the CPU and
the DMA controller module. DMA RAM is utilized by the
DMA controller to store data to be transferred to various
peripherals using DMA, as well as data transferred from
various peripherals using DMA. The DMA RAM can be
accessed by the DMA controller without having to steal
cycles from the CPU.
When the CPU and the DMA controller attempt to
concurrently write to the same DMA RAM location, the
hardware ensures that the CPU is given precedence in
accessing the DMA RAM location. Therefore, the DMA
RAM provides a reliable means of transferring DMA
data without ever having to stall the CPU.
Note:
DMA RAM can be used for general
purpose data storage if the DMA function
is not required in an application.
相關(guān)PDF資料
PDF描述
MA320001 MODULE PLUG-IN PIC32 100QFP
RBM08DRMT-S288 CONN EDGECARD 16POS .156 EXTEND
GSM12DTKN-S288 CONN EDGECARD 24POS .156 EXTEND
AC002021 CABLE MPLAB PM3 ICSP
GSM12DTKH-S288 CONN EDGECARD 24POS .156 EXTEND
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MA330011 制造商:Microchip Technology Inc 功能描述:dsPIC33 GP 100P to 100P TQFP Plug-In Mod
MA330012 功能描述:子卡和OEM板 dsPIC33F GP 100P to 84P Plug In Module RoHS:否 制造商:BeagleBoard by CircuitCo 產(chǎn)品:BeagleBone LCD4 Boards 用于:BeagleBone - BB-Bone - Open Source Development Kit
MA330013 功能描述:子卡和OEM板 dsPIC33F Plug In Module RoHS:否 制造商:BeagleBoard by CircuitCo 產(chǎn)品:BeagleBone LCD4 Boards 用于:BeagleBone - BB-Bone - Open Source Development Kit
MA330014 功能描述:子卡和OEM板 dsPIC33 MC RoHS:否 制造商:BeagleBoard by CircuitCo 產(chǎn)品:BeagleBone LCD4 Boards 用于:BeagleBone - BB-Bone - Open Source Development Kit
MA330015 功能描述:子卡和OEM板 dsPIC33 GP RoHS:否 制造商:BeagleBoard by CircuitCo 產(chǎn)品:BeagleBone LCD4 Boards 用于:BeagleBone - BB-Bone - Open Source Development Kit