M908-02 Datasheet Rev 0.4
4 of 6
Revised 30Jul2004
M908-02
VCSO BASED CLOCK GENERATOR
Preliminar y In f o r m atio n
External Loop Filter
To provide stable PLL operation, and thereby a low jitter
output clock, the M908-02 requires the use of an
external loop filter. This is provided via the provided
The loop filter is implemented as a differential circuit
to minimize system noise interference. Due to the
differential signal path design, the implementation
requires two identical complementary RC filters as
shown here.
additional product information.
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C
POST
C
POST
VC
nVC
R
POST
nOP_OUT
OP_OUT
R
POST
R
LOOP
R
LOOP
C
LOOP
C
LOOP
OP_IN
nOP_IN
Example External Loop Filter Component Values
PLL Bandwidth
(kHz)
Damping
Factor
R loop
(k
)
C loop
(
F)
R post
(k
)
C post
(pF)
0.395
2.0
1.5
4.70
20
3300
1.2
2.9
4.7
1.00
20
1000
10
1
Note 1: Recommended for minimum output jitter when
using a crystal or crystal oscillator reference.
2.4
39.0
0.01
20
240
ABSOLUTE MAXIMUM RATINGS1
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional operation of product at these conditions
AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect product reliability.
Symbol Parameter
Rating
Unit
V
I
Inputs
-0.5 to V
CC +0.5
V
O
Outputs
-0.5 to V
CC +0.5
V
CC
Power Supply Voltage
4.6
V
T
S
Storage Temperature
-45 to +100
oC
RECOMMENDED CONDITIONS OF OPERATION
Symbol Parameter
Min
Typ
Max
Unit
V
CC
Positive Supply Voltage
3.135
3.3
3.465
V
T
A
Ambient Operating Temperature
Commercial
0
+70
oC
Industrial
-40
+85
oC