參數(shù)資料
型號(hào)： M8761ED
廠商： Wolfson Microelectronics
英文描述： 24BIT 192KHZ STEREO DAC
中文描述： 24位192kHz的立體聲DAC
文件頁(yè)數(shù)： 14/20頁(yè)
文件大?。?/td> 223K
代理商： M8761ED
WM8761
Production Data
w
PD Rev 4.0 May 2004
14
A diagram showing how the various Mute modes interact is shown below in Figure 8.
AUTOMUTED
(Internal Signal)
10k
SOFTMUTE
(Internal Signal)
MUTE
PIN
Figure 8 Selection Logic for MUTE Modes
INPUT AUDIO FORMAT SELECTION
FORMAT (pin 13) controls the data input format.
FORMAT
0
1
INPUT DATA MODE
24 bit right justified
16–24 bit I
2
S
Table 3 Input Audio Format Selection
Notes:
1.
In 16-24 bit I
2
S mode, any data from 16-24 bits or more is supported provided that LRCIN is
high for a minimum of data width BCKINs and low for a minimum of data width BCKINs,
unless Note 2. For data widths greater than 24 bits, the LSB’s will be truncated and the
most significant 24 bits will be used by the internal processing.
2.
If exactly 16 BCKIN cycles occur in both the low and high period of LRCIN the WM8761 will
assume the data is 16-bit and accept the data accordingly.
INPUT DSP FORMAT SELECTION
FORMAT
0
50% LRCIN DUTY CYCLE
24-bit
(MSB-first, right justified)
Up to 24-bit I
2
S format
(Philips serial data protocol)
LRCIN of 4 BCKIN or Less Duration
DSP format – ‘late’ mode
1
DSP format – ‘early’ mode
Table 4 DSP Interface Formats
DE-EMPHASIS CONTROL
DEM (pin 12) is an input control for selection of de-emphasis filtering to be applied.
DEEMPH
0
1
DE-EMPHASIS
Off
On
Table 5 De-emphasis Control
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