參數(shù)資料
型號(hào): M74VHC1GT125
廠商: ON SEMICONDUCTOR
英文描述: Noninverting Buffer/CMOS Logic Level Shifter(正相緩沖器/CMOS邏輯電平移位器)
中文描述: 同相緩沖/ CMOS邏輯電平轉(zhuǎn)換器(正相緩沖器/的CMOS邏輯電平移位器)
文件頁(yè)數(shù): 3/6頁(yè)
文件大?。?/td> 89K
代理商: M74VHC1GT125
MC74VHC1GT125
http://onsemi.com
3
Symbol
V
IH
AC ELECTRICAL CHARACTERISTICS
Input t
r
= t
f
= 3.0 ns
Parameter
Test Conditions
(V)
C
L
= 50pF
T
= 25
°
C
Typ
C
L
= 50pF
5.1
V
CC
= 3.3
±
0.3 V C
L
= 15pF
R
L
= R
I
= 500
C
L
= 50pF
T
85
°
C
Min
4.5
4.4
55
T
125
°
C
Min
Unit
V
Min
2.0
Max
Max
1.4
2.0
0.0
Max
Minimum HighLevel
5.5
3.0
1.4
0.53
2.0
1.4
V
Maximum LowLevel
3.0
0.53
0.10
1.0
0.53
0.8
V
Output Voltage
V
IN
= V
IH
or V
IL
I
= 8 mA
OL
IN
IH
IL
I
OL
= 8 mA
V
IN
= 5.5 V or GND
4.4
4.5
3.94
3.80
3.66
V
Maximum LowLevel
= V
or V
4.5
V
4.5
0.36
0.44
0.52
0.52
1.0
I
IN
Maximum Input
0 to
A
Supply Current
I
CCT
Quiescent Supply
CC
Input: V
= 3.4 V
5.5
1.35
±
0.25
1.50
±
2.5
1.65
mA
Current
I
OZ
OPD
Maximum 3State
V
= V
or V
OUT
CC
OUT
5.5
Typical @ 25
°
C, V
CC
= 5.0 V
2.5
A
Symbol
t
Parameter
Test Conditions
CC
L
T
A
= 25
C
T
A
85
C
55
T
A
125
C
Unit
5.5
7.5
9.5
13.0
(Figures 3 and 5.)
1.0
1.0
V
= 5.0
0.5 V C
= 15pF
3.8
5.3
7.1
6.5
8.5
9.5
13.0
8.5
10.5
PZL
(Figures 4 and 5)
CC
L
R
V
R
L
= R
I
= 500
1.0
15.0
6.5
8.8
9.7
8.0
11.5
15.0
9.5
t
PLZ
,
Maximum Output
(Figures 4 and 5)
1.0
1.0
10.0
14.5
ns
7.0
12.0
C
out
C
in
Maximum ThreeState
in High Impedance State)
Maximum Input Capacitance
6
4
10
10
10
pF
pF
C
PD
Power Dissipation Capacitance (Note 5)
5. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
CC(OPR
= C
PD
V
CC
f
in
+ I
CC
/4 (per buffer). C
PD
is used to determine the
noload dynamic power consumption; P
D
= C
PD
V
CC2
f
in
+ I
CC
V
CC
.
pF
14
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