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參數(shù)資料
| 型號(hào)： | M74HCT651RM13TR |
| 廠商： | STMICROELECTRONICS |
| 元件分類(lèi)： | 總線收發(fā)器 |
| 英文描述： | HCT SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24 |
| 封裝： | SOP-24 |
| 文件頁(yè)數(shù)： | 8/15頁(yè) |
| 文件大?。?/td> | 350K |
| 代理商： | M74HCT651RM13TR |
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M74HCT651
2/15
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
TRUTH TABLE
PIN No
SYMBOL
NAME AND FUNCTION
1
CAB
A to B Clock Input (LOW
to HIGH, Edge-Triggered)
2
SAB
Select A to B Source Input
3
GAB
Direction Control Input
4, 5, 6, 7, 8,
9, 10, 11
A1 to A8
A Data Inputs/Outputs
20, 19, 18,
17, 16, 15,
14, 13
B1 to B8
B Data Inputs/Outputs
21
GBA
Output Enable Input
(Active LOW)
22
SBA
Select B to A Source Input
23
CBA
B to A Clock Input (LOW
to HIGH, Edge Triggered)
12
GND
Ground (0V)
24
VCC
Positive Supply Voltage
GAB GBA CAB CBA SAB SBA
A
B
FUNCTION
LH
INPUTS
Both the A bus and the B bus are inputs
X
Z
The Output functions of the A and B bus are disabled
X
INPUTS
Both the A and B bus are used for inputs to the internal
flip-flops. Data at the bus will be stored on low to high
transition of the clock inputs.
LL
OUTPUTS
INPUTS
The A bus are outputs and the B bus are inputs
X*
X
L
LH
The data at the B bus are displayed at the A bus
HL
X*
X
L
H
The data at the B bus are displayed at the A bus. The
data of the B bus are stored to internal flip-flop on low
to high transition of the clock pulse
HL
X*
X
H
Qn
X
The data stored to the internal flip-flop are displayed at
the A bus.
X*
X
H
L
H
The data at the B bus are stored to the internal flip-flop
on low to high transition of the clock pulse. The states
of the internal flip-flops output directly to the A bus.
HL
HH
INPUTS
OUTPUTS The A bus are inputs and the B bus are outputs.
XX*
L
X
LH
The data at the A bus are displayed at the B bus
HL
X*
L
X
L
H
The data at the A bus are displayed at the B bus. The
data of the A bus are stored to the internal flip-flop on
low to high transition of the clock pulse.
HL
XX*H
X
Qn
The data stored to the internal flip-flops are displayed
at the B bus
X*
H
X
L
H
The data at the A bus are stored to the internal flip-flop
on low to high transition of the clock pulse. The states
of the internal flip-flops output directly to the B bus.
X*
H
X
H
L
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| M74HCT652B1R | 功能描述:總線收發(fā)器 Octal Bus Trans/Reg RoHS:否 制造商:Fairchild Semiconductor 邏輯類(lèi)型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類(lèi)型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| M74HCT652RM13TR | 功能描述:總線收發(fā)器 Octal Bus Trans/Reg RoHS:否 制造商:Fairchild Semiconductor 邏輯類(lèi)型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類(lèi)型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| M74HCT688B1R | 功能描述:校驗(yàn)器 IC 8-Bit Equality Comp RoHS:否 制造商:STMicroelectronics 產(chǎn)品: 比較器類(lèi)型: 通道數(shù)量: 輸出類(lèi)型:Push-Pull 電源電壓-最大:5.5 V 電源電壓-最小:1.1 V 補(bǔ)償電壓（最大值）:6 mV 電源電流（最大值）:1350 nA 響應(yīng)時(shí)間: 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SC-70-5 封裝:Reel |
| M74HCT688RM13TR | 功能描述:校驗(yàn)器 IC 8-Bit Equality Comp RoHS:否 制造商:STMicroelectronics 產(chǎn)品: 比較器類(lèi)型: 通道數(shù)量: 輸出類(lèi)型:Push-Pull 電源電壓-最大:5.5 V 電源電壓-最小:1.1 V 補(bǔ)償電壓（最大值）:6 mV 電源電流（最大值）:1350 nA 響應(yīng)時(shí)間: 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SC-70-5 封裝:Reel |
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