參數(shù)資料
型號： M74HC4024TTR
廠商： 意法半導(dǎo)體
元件分類： 通用總線功能
英文描述： 7 STAGE BINARY COUNTER
中文描述： 7位的二進(jìn)制計(jì)數(shù)器
文件頁數(shù)： 1/11頁
文件大?。?/td> 246K
代理商： M74HC4024TTR
M54HC4024
M74HC4024
October 1992
7 STAGE BINARY COUNTER
B1R
(Plastic Package)
ORDER CODES :
M54HC4024F1R
M74HC4024B1R
M74HC4024M1R
M74HC4024C1R
F1R
(CeramicPackage)
M1R
(MicroPackage)
C1R
(Chip Carrier)
PIN CONNECTIONS
(top view)
NC =
No Internal
Connection
DESCRIPTION
.
HIGH SPEED
t
PD
= 13 ns(TYP.) AT V
CC
= 5 V
.
LOWPOWER DISSIPATION
I
CC
= 4
μ
A(MAX.) AT T
A
= 25
°
C
.
HIGH NOISE IMMUNITY
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
.
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
|I
OH
|= I
OL
= 4 mA (MIN.)
.
BALANCEDPROPAGATION DELAYS
t
PLH
= t
PHL
.
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V TO6 V
.
PIN ANDFUNCTION COMPATIBLE
WITH 4024B
The M54/74HC4024 is a high speed CMOS 7-
STAGE BINARY COUNTER fabricated in silicon
gate C
2
MOS technology. It has the same high
speed performance of LSTTL combined with true
CMOS low power consumption. The HC4024 is a 7
stage Counter. This devices is incremented on the
falling edge (negative transition) of the input clock,
and all itsoutputs arereset toa lowlevelby applying
a logical high on their reset input. All inputs are
equipped with protection circuits against static dis-
charge and transient excess voltage.
1/11
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