參數(shù)資料
型號： M74HC02TTR
廠商： STMICROELECTRONICS
元件分類： 門電路
英文描述： HC/UH SERIES, QUAD 2-INPUT NOR GATE, PDSO14
封裝： TSSOP-14
文件頁數(shù)： 1/8頁
文件大?。?/td> 179K
代理商： M74HC02TTR
1/8
July 2001
s
HIGH SPEED:
tPD = 8ns (TYP.) at VCC = 6V
s
LOW POWER DISSIPATION:
ICC = 1A(MAX.) at TA=25°C
s
HIGH NOISE IMMUNITY:
VNIH = VNIL = 28 % VCC (MIN.)
s
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 4mA (MIN)
s
BALANCED PROPAGATION DELAYS:
tPLH tPHL
s
WIDE OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V
s
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 02
DESCRIPTION
The M74HC02 is an high speed CMOS QUAD
2-INPUT NOR GATE fabricated with silicon gate
C2MOS technology.
The internal circuit is composed of 3 stages
including buffer output, which enables high noise
immunity and stable output.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HC02
QUAD 2-INPUT NOR GATE
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE
TUBE
T & R
DIP
M74HC02B1R
SOP
M74HC02M1R
M74HC02RM13TR
TSSOP
M74HC02TTR
TSSOP
DIP
SOP
相關(guān)PDF資料
PDF描述
M74HC02M1R HC/UH SERIES, QUAD 2-INPUT NOR GATE, PDSO14
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M74HC113RM13TR HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
M74HC113M1R HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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