參數(shù)資料
型號(hào): M68000PM
廠商: Motorola, Inc.
英文描述: Addendum to M68000 User Manual
中文描述: 增編M68000用戶手冊(cè)
文件頁(yè)數(shù): 2/5頁(yè)
文件大小: 278K
代理商: M68000PM
C68000 Megafunction Datasheet
Pin Description
Name
Type Polarity/
Bus size
I
O
8
Description
p0i
p0o
8
Port 0:
is an 8-bit bi-directional I/O port with separated inputs and outputs. Port 0 is also
the multiplexed low-order address and data bus during accesses to external program and
data memories.
Port 1:
is an 8-bit bi-directional I/O port with separated inputs and outputs. Port 1 also
serves special features.
Port 2:
is an 8-bit bi-directional I/O port with separated inputs and outputs. Port 2 emits
the high-order address byte during fetches from external program memory that use 16-bit
addresses (MOVX @DPTR).
Port 3:
is an 8-bit bi-directional I/O port with separated inputs and outputs. Port 3 also
serves special features.
Clock:
Is an input of pulse for internal clock counters and all synchronous circuits
Timekeeping clock:
is a 32.768 kHz pulse supplies the time-base for the Real Time Clock
Hardware reset input:
A high on this pin for two clock cycles while the oscillator is running resets the device
Power Fail Interrupt:
The input of off-megafunction voltage comparator, which generates early warning interrupt
External Access Enable:
The ‘ea’ must be externally held low to enable the device to fetch code from external
program memory0000H and 0FFFH. If ‘ea’ is held high, the device executes from in-circuit
program memory unless the Program counter contains an address greater than 0FFFH.
Address Latch Enable:
The output pulse for latching the low byte of the Address during an access to external
memory. In normal operations, ‘a(chǎn)le’ is driven at a constant rate of 1/6 the oscillator
frequency.
Program Store Enable:
The read strobe to external program memory. When the C68000 is executing code from the
external program memory, ‘psen’ is activated each machine cycle, ‘psen’ is not activated
during fetches from in-circuit program memory.
Internal Program Memory interface:
Memory data bus
Memory address bus
Memory output enable
Internal Data Memory interface:
Memory data bus input
Memory data bus output
Memory address bus
Memory write enable
Memory output enable
External Special Function Registers interface:
SFR data bus input
SFR data bus output
SFR address bus
SFR write enable
SFR output enable
p1i
p1o
p2i
p2o
I
O
I
O
8
8
8
8
p3i
p3o
clk
rtcx
reset
I
O
I
I
I
8
8
Rise
Rise
High
pfi
I
High
ea
I
Low
ale
O
High
psen
O
Low
romdatai
romaddr
romoe
ramdatai
ramdatao
ramaddr
ramwe
ramoe
sfrdatai
sfrdatao
sfraddr
sfrwe
sfroe
O
O
O
I
O
O
O
O
I
O
O
O
O
8
14
High
8
8
8
High
High
8
8
7
High
High
Applications
Microcomputer systems
Embedded microcontroller systems
Data computation and transfer
Communication systems
Professional audio and video
CAST, Inc.
Page 2
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