- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384643 > M66255FP (Mitsubishi Electric Corporation) Cable Ties; Pack Quantity:1000 RoHS Compliant: Yes PDF資料下載
參數(shù)資料
| 型號： | M66255FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | Cable Ties; Pack Quantity:1000 RoHS Compliant: Yes |
| 中文描述： | 8192 × 10位列內(nèi)存（先進先出） |
| 文件頁數(shù)： | 1/11頁 |
| 文件大?。?/td> | 152K |
| 代理商： | M66255FP |
1
M66255FP
8192
×
10-BIT LINE MEMORY (FIFO)
8192
×
10-BIT LINE MEMORY (FIFO)
MIMITSUBISHI
DIDIGITAL ASSP
DESCRIPTION
The M66255FP is a high-speed line memory with a FIFO
(First In First Out) structure of 8192-word
×
10-bit configura-
tion which uses high-performance silicon gate CMOS pro-
cess technology.
It has separate clock, enable and reset signals for write and
read, and is most suitable as a buffer memory between de-
vices with different data processing throughput.
FEATURES
Memory configuration of 8192 words
×
10 bits (dynamic
memory)
High-speed cycle ............................................. 30ns (Min.)
High-speed access ......................................... 25ns (Max.)
Output hold ........................................................ 5ns (Min.)
Fully independent, asynchronous write and read operations
Variable length delay bit
Output ....................................................................3 states
APPLICATION
Digital photocopiers, high-speed facsimile, laser beam print-
ers.
PIN CONFIGURATION (TOP VIEW)
BLOCK DIAGRAM
23
MEMORY ARRAY OF
8192-WORD
×
10-BIT
CONFIGURATION
W
R
R
W
22
20
21
WE
WRES
WCK
V
CC
WRITE
ENABLE INPUT
WRITE
RESET INPUT
WRITE
CLOCK INPUT
6
7
9
8
RE
RRES
RCK
GND
READ
ENABLE INPUT
READ
RESET INPUT
READ
CLOCK INPUT
16
15
28
INPUT BUFFER
DATA INPUT
D
0
~
D
9
OUTPUT BUFFER
17 18 19 24 25 26 27
1
3 4 5 10 11 12 13
DATA OUTPUT
Q
0
~
Q
9
DATA INPUT
DATA OUTPUT
DATA OUTPUT
DATA INPUT
28
17
18
19
20
21
22
23
24
25
26
READ ENABLE INPUT
WRITE ENABLE INPUT
WRITE RESET INPUT
WRITE CLOCK INPUT
READ RESET INPUT
READ CLOCK INPUT
M
27
1
11
12
15
16
13
14
10
9
8
7
6
5
4
3
2
Q
0
←
Q
1
←
Q
2
←
Q
3
←
Q
4
←
Q
5
←
Q
6
←
Q
7
←
Q
8
←
Q
9
←
RCK
→
RRES
→
RE
→
GND
←
D
0
←
D
1
←
D
2
←
D
3
←
D
4
←
WE
←
WRES
←
WCK
←
D
5
←
D
6
←
D
7
←
D
8
←
D
9
V
CC
Outline 28P2W-C
2
14
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M66273FP | LCD CONTROLLER with VRAM |
| M66280FP | 5120 x 8-BIT LINE MEMORY |
| M66281FP | 5120 x 8-BIT x 2 LINE MEMORY |
| M66282FP | 8192 x 8-BIT LINE MEMORY |
| M66290AFP | USB DEVICE CONTROLLER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M66255FP(#TB0T) | 制造商:Renesas Electronics Corporation 功能描述: |
| M66256 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:5120 x 8-BIT LINE MEMORY (FIFO) |
| M66256FP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:5120 × 8-Bit Line Memory (FIFO) |
| M66256FP(#TF0T) | 制造商:Renesas Electronics Corporation 功能描述: |
| M66257 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:5120 x 8-BIT x 2 LINE MEMORY (FIFO) |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。