
1.5 Precautions for Serial I/O (Clock-synchronous Serial I/O)
16
Mitsubishi microcomputers
M16C / 62P Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
development
Preliminary Specifications Rev.1.0
Specifications in this manual are tentative and subject to change.
1.5 Precautions for Serial I/O (Clock-synchronous Serial I/O)
1.5.1 Transmission/reception
1. With an external clock selected, and choosing the RTS function, the output level of the RTSi pin goes
to
“
L
”
when the data-receivable status becomes ready, which informs the transmission side that the
reception has become ready. The output level of the RTSi pin goes to
“
H
”
when reception starts. So if
the RTSi pin is connected to the CTSi pin on the transmission side, the circuit can transmission and
reception data with consistent timing. With the internal clock, the RTS function has no effect.
2. If a low-level signal is applied to the NMI pin when the TB2SC register IVPCR1 bit =
“
1
”
(three-phase
output forcible cutoff by input on NMI pin enabled), the RTS
2
and CLK
2
pins go to a high-impedance
state.