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參數(shù)資料
| 型號(hào)： | M5M5V108DFP-70H |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM |
| 中文描述： | 1048576位（131072 - Word的8位）的CMOS靜態(tài)RAM |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 59K |
| 代理商： | M5M5V108DFP-70H |
MITSUBISHI LSIs
M5M5V108DFP,VP,KV -70H
1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM
7th.July.2000 Ver. 1.0
MITSUBISHI
ELECTRIC
FUNCTION
The operation mode of the M5M5V108D series are determined by
a combination of the device control inputs S
1
,S
2
,W and OE.
Each mode is summarized in the function table.
A write cycle is executed whenever the low level W overlaps with
the low level S
1
and the high level S
2
. The address must be set up
before the write cycle and must be stable during the entire cycle.
The data is latched into a cell on the trailing edge of W,S
1
or
S
2
,whichever occurs first,requiring the set-up and hold time relative
to these edge to be maintained. The output enable input OE
directly controls the output stage. Setting the OE at a high level,
the output stage is in a high-impedance state, and the data bus
contention problem in the write cycle is eliminated.
A read cycle is executed by setting W at a high level and OE at a
low level while S
1
and S
2
are in an active state(S
1
=L,S
2
=H).
FUNCTION TABLE
BLOCK DIAGRAM
When setting S
1
at a high level or S
2
at a low level, the chip are in
a non-selectable mode in which both reading and writing are
disabled. In this mode, the output stage is in a high- impedance
state, allowing OR-tie with other chips and memory expansion by
S
1
and S
2
. The power supply current is reduced as low as the
stand-by current which is specified as I
CC3
or I
CC4
, and the memory
data can be held at +2V power supply, enabling battery back-up
operation during power failure or power-down operation in the non-
selected mode.
S
1
X
S
2
L
W
X
OE
X
Mode
DQ
I
CC
L
L
H
H
H
H
L
H
Non selection
Non selection High-impedance
Write
Read
High-impedance
Din
Dout
Active
Stand-by
Stand-by
High-impedance
Active
Active
L
H
L
X
H
X
X
X
2
CLOCK
GENERATOR
131072 WORDS
X 8 BITS
( 512 ROWS
X128 COLUMNS
X 16BLOCKS )
8
7
6
5
4
3
2
31
28
16
15
14
13
12
11
10
7
4
12
11
10
9
20
19
18
17
27
26
25
3
2
1
21
22
23
25
26
27
28
29
13
14
15
17
18
19
20
21
5
30
6
32
8
29
22
30
24
32
16
24
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
W
S1
S2
OE
V
CC
GND
(0V)
* Pin numbers inside dotted line show those of TSOP
*
*
DATA
INPUTS/
OUTPUTS
WRITE
CONTROL
INPUT
CHIP
SELECT
INPUTS
OUTPUT
ENABLE
INPUT
ADDRESS
INPUTS
23
31
A3
A2
A5
A6
A7
A12
A14
A16
A15
A3
A8
A9
A11
A1
A0
A10
A4
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M5M5V108DKV-70H | 1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM |
| M5M5V208FP-85L-W | 2097152-BIT (262144-WORD BY 8-BIT) CMOS STATIC RAM |
| M5M5V208FP-12L-W | Coaxial Cable; Coaxial RG/U Type:6; Impedance:75ohm; Conductor Size AWG:18; No. Strands x Strand Size:Solid; Jacket Material:Polyvinylchloride (PVC); Leaded Process Compatible:Yes; Voltage Nom.:300V RoHS Compliant: Yes |
| M5M5V208VP-12L-W | Coaxial Cable; Coaxial RG/U Type:6; Impedance:75ohm; Conductor Size AWG:18; No. Strands x Strand Size:Solid; Jacket Material:Polyvinylchloride (PVC); Leaded Process Compatible:Yes; Voltage Nom.:300V RoHS Compliant: Yes |
| M5M5V208RV-12L-W | Coaxial Cable; Coaxial RG/U Type:8; Impedance:52ohm; Conductor Size AWG:13; No. Strands x Strand Size:7 x 21; Jacket Material:Polyvinylchloride (PVC); Cable/Wire MIL SPEC:MIL-C-17D; Conductor Material:Copper; Jacket Color:Black RoHS Compliant: Yes |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M5M5V108DFP-70H(#BT) | 制造商:Renesas Electronics Corporation 功能描述: |
| M5M5V108DFP-70HBT | 制造商:Renesas Electronics Corporation 功能描述:Memory,Low-pwr SRAM,1M bit,x8, |
| M5M5V108DFP-70HI#T | 制造商:Renesas Electronics Corporation 功能描述:SRAM ASYNC SGL 3.3V 1MBIT 128KX8 70NS 32SOP - Tape and Reel |
| M5M5V108DFP-70HI(#BT) | 制造商:Renesas Electronics Corporation 功能描述: |
| M5M5V108DFP-70HIBT | 制造商:Renesas Electronics Corporation 功能描述:Memory,Low-pwr SRAM,1M bit,x8, |
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