參數(shù)資料
型號： M58WR128EBZB
廠商： 意法半導(dǎo)體
英文描述： 128 Mbit 8Mb x 16, Multiple Bank, Burst 1.8V Supply Flash Memory
中文描述： 128兆位和8Mb × 16，多銀行，突發(fā)1.8V電源快閃記憶體
文件頁數(shù)： 59/87頁
文件大?。?/td> 1113K
代理商： M58WR128EBZB
62/87
APPENDIX B. COMMON FLASH INTERFACE
The Common Flash Interface is a JEDEC ap-
proved, standardized data structure that can be
read from the Flash memory device. It allows a
system software to query the device to determine
various electrical and timing parameters, density
information and functions supported by the mem-
ory. The system can interface easily with the de-
vice, enabling the software to upgrade itself when
necessary.
When the Read CFI Query Command is issued
the device enters CFI Query mode and the data
structure is read from the memory. Tables 34, 35,
dresses used to retrieve the data. The Query data
is always presented on the lowest order data out-
puts (DQ0-DQ7), the other outputs (DQ8-DQ15)
are set to 0.
The CFI data structure also contains a security
area where a 64 bit unique security number is writ-
Register Memory Map). This area can be access-
ed only in Read mode by the final user. It is impos-
sible to change the security number after it has
been written by ST. Issue a Read Array command
to return to Read mode.
Table 34. Query Structure Overview
Note: The Flash memory display the CFI data structure when CFI Query command is issued. In this table are listed the main sub-sections
detailed in Tables 35, 36, 37 and 38. Query data is always presented on the lowest order data outputs.
Table 35. CFI Query Identification String
Offset
Sub-section Name
Description
00h
Reserved
Reserved for algorithm-specific information
10h
CFI Query Identification String
Command set ID and algorithm data offset
1Bh
System Interface Information
Device timing & voltage information
27h
Device Geometry Definition
Flash device layout
P
Primary Algorithm-specific Extended Query table
Additional information specific to the Primary
Algorithm (optional)
A
Alternate Algorithm-specific Extended Query table
Additional information specific to the Alternate
Algorithm (optional)
80h
Security Code Area
Lock Protection Register
Unique device Number and
User Programmable OTP
Offset
Sub-section Name
Description
Value
00h
0020h
Manufacturer Code
ST
01h
881Eh
881Fh
Device Code
Top
Bottom
02h
reserved
Reserved
03h
reserved
Reserved
04h-0Fh
reserved
Reserved
10h
0051h
Query Unique ASCII String "QRY"
"Q"
11h
0052h
"R"
12h
0059h
"Y"
13h
0003h
Primary Algorithm Command Set and Control Interface ID code 16
bit ID code defining a specific algorithm
14h
0000h
15h
offset = P = 0039h
Address for Primary Algorithm extended Query table (see Table 37)
p = 39h
16h
0000h
17h
0000h
Alternate Vendor Command Set and Control Interface ID Code
second vendor - specified algorithm supported
NA
18h
0000h
19h
value = A = 0000h
Address for Alternate Algorithm extended Query table
NA
1Ah
0000h
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