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參數(shù)資料
| 型號(hào)： | M54HC697C1R |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類(lèi)： | 計(jì)數(shù)器 |
| 英文描述： | HC697/699 U/D 4 BIT BINARY COUNTER/REGISTER 3-STATE HC696/698 U/D DECADE COUNTER/REGISTER 3-STATE |
| 中文描述： | HC697/699上/下4位二進(jìn)制計(jì)數(shù)器/注冊(cè)3態(tài)HC696/698上/下十進(jìn)制計(jì)數(shù)器/寄存器三態(tài) |
| 文件頁(yè)數(shù)： | 7/22頁(yè) |
| 文件大小： | 429K |
| 代理商： | M54HC697C1R |
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Symbol
Parameter
Test Conditions
Value
Unit
VCC
(V)
CL
(pF)
TA =25
oC
54HC and 74HC
-40 to 85
oC
74HC
-55 to 125
oC
54HC
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
tPZL
tPZH
Output Enable
Time
2.0
50
RL =1K
45
120
150
180
ns
4.5
15
24
30
36
6.0
13
20
26
31
2.0
150
RL =1K
57
150
190
225
ns
4.5
19
30
38
45
6.0
16
26
32
38
tPLZ
tPHZ
Output Disable
Time
2.0
50
RL =1K
32
115
145
175
ns
4.5
17
23
29
35
6.0
14
20
25
30
tW(H)
tW(L)
Minimum Pulse
Width
(CCK, RCK)
2.0
50
40
75
95
110
ns
4.5
8
151922
6.0
7
131619
tW(L)
Minimum Pulse
Width
(CCLR)
2.0
50
for
HC696
HC697
40
75
95
110
ns
4.5
8
151922
6.0
7
131619
ts
Minimum Set-up
Time
(CCLR)
2.0
50
for
HC698
HC699
16
50
65
75
ns
4.5
4
101315
6.0
3
9
11
13
ts
Minimum Set-up
Time (LOAD,
ENT, ENP)
2.0
50
64
150
190
220
ns
4.5
16
30
38
44
6.0
14
26
32
37
ts
Minimum Set-up
Time
(A, B, C, D)
2.0
50
16
50
65
75
ns
4.5
4
101315
6.0
3
9
11
13
ts
Minimum Set-up
Time
(CCK, RCK)
2.0
50
44
100
125
150
ns
4.5
11
20
25
30
6.0
9
172126
ts
Minimum Set-up
Time
(U/D)
2.0
50
44
100
125
145
ns
4.5
11
20
25
29
6.0
9
172125
th
Minimum Hold
Time
2.0
50
555
ns
4.5
5
6.0
5
tREM
Minimum
Removal Time
2.0
50
for
HC696
HC697
555
ns
4.5
5
6.0
5
CIN
Input Capacitance
5
10
pF
CPD (*)
Power Dissipation
Capacitance
HC696/697/699
HC698
71
77
pF
(*) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load.
(Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD
VCC fIN +ICC/2 (per circuit)
AC ELECTRICAL CHARACTERISTICS (Continued)
M54/M74HC696/697/698/699
15/22
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參數(shù)描述 |
|---|---|
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