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參數(shù)資料
| 型號： | M54HC279F1R |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | QUAD S - R LATCH |
| 中文描述： | 四碼- R鎖存 |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 239K |
| 代理商： | M54HC279F1R |
M54HC279
M74HC279
March 1993
QUAD S - R LATCH
B1R
(Plastic Package)
ORDER CODES :
M54HC279F1R
M74HC279B1R
M74HC279M1R
M74HC279C1R
F1R
(CeramicPackage)
M1R
(MicroPackage)
C1R
(Chip Carrier)
PIN CONNECTIONS
(top view)
NC =
No Internal
Connection
.
HIGH SPEED
t
PD
= 12 ns(TYP.) AT V
CC
= 5 V
.
LOWPOWER DISSIPATION
I
CC
= 2
μ
A(MAX.) AT T
A
= 25
°
C
.
HIGH NOISE IMMUNITY
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
.
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
I
OH
= I
OL
= 4 mA (MIN.)
.
BALANCEDPROPAGATION DELAYS
t
PLH
= t
PHL
.
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V TO6 V
.
PIN ANDFUNCTION COMPATIBLE
WITH 54/74LS279
The M54/74HC279 isa high speedCMOSQUAD S
- R LATCH fabricated in silicon gate C
2
MOS tech-
nology. It has the same high speed performance of
LSTTL combined with true CMOS low power con-
sumption.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
DESCRIPTION
INPUT AND OUTPUT EQUIVALENT CIRCUIT
1/10
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