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參數(shù)資料
| 型號： | M54HC238K |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 編、解碼器及復(fù)用、解復(fù)用 |
| 英文描述： | HC/UH SERIES, OTHER DECODER/DRIVER, TRUE OUTPUT, CDFP16 |
| 封裝： | CERAMIC, DFP-16 |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 280K |
| 代理商： | M54HC238K |
1/10
June 2004
s
HIGH SPEED:
tPD = 15ns (TYP.) at VCC = 6V
s
LOW POWER DISSIPATION:
ICC = 4A(MAX.) at TA=25°C
s
HIGH NOISE IMMUNITY:
VNIH = VNIL = 28% VCC (MIN.)
s
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 4mA (MIN)
s
BALANCED PROPAGATION DELAYS:
tPLH tPHL
s
WIDE OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V
s
PIN AND FUNCTION COMPATIBLE WITH
54 SERIES 238
s
DEVICE FULLY COMPLIANT WITH
SCC-9205-016
DESCRIPTION
The M54HC238 is an high speed CMOS 3 TO 8
LINE DECODER fabricated with silicon gate
C2MOS technology.
If the device is enabled, 3 binary select inputs (A,
B and C) determine which one of outputs will go
high. When enable input G1 is held "Low" or either
G2A or G2B is held "High" decoding function is
inhibited and all the 8 outputs go low. Three
enable inputs are provided to ease cascade
connection
and
application
of
this
address
decoder in memory systems.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M54HC238
RAD-HARD 3 TO 8 LINE DECODER
PIN CONNECTION
ORDER CODES
PACKAGE
FM
EM
DILC
M54HC238D
M54HC238D1
FPC
M54HC238K
M54HC238K1
DILC-16
FPC-16
Rev. 2
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