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參數(shù)資料
| 型號： | M54HC10F1R |
| 廠商： | 意法半導體 |
| 英文描述： | TRIPLE 3-INPUT NAND GATE |
| 中文描述： | 三重3輸入與非門 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 232K |
| 代理商： | M54HC10F1R |
M54HC27
M74HC27
February 1993
TRIPLE3-INPUT NOR GATE
B1R
(Plastic Package)
ORDER CODES :
M54HC27F1R
M74HC27B1R
M74HC27M1R
M74HC27C1R
F1R
(CeramicPackage)
M1R
(MicroPackage)
C1R
(Chip Carrier)
PIN CONNECTIONS
(top view)
NC =
No Internal
Connection
INPUT AND OUTPUT EQUIVALENT CIRCUIT
.
HIGH SPEED
t
PD
= 7 ns (TYP.) AT V
CC
= 5 V
.
LOWPOWER DISSIPATION
I
CC
= 1
μ
A(MAX.) AT T
A
= 25
°
C
.
HIGH NOISE IMMUNITY
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
.
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
IOH
= I
OL
= 4 mA(MIN.)
.
BALANCEDPROPAGATION DELAYS
t
PLH
= t
PHL
.
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V TO6 V
.
PIN AND FUNCTION COMPATIBLE WITH
54/74LS27
The M54/74HC27 is a high speed CMOS TRIPLE
3-INPUT NOR GATE fabricated in silicon gate
C
2
MOS technology.
It has the same high speed performance of LSTTL
combined with true CMOS low power consumption.
The internal circuit is composed of 3 stages includ-
ingbufferedoutput,which giveshighnoiseimmunity
and astableoutput. Allinputsareequippedwithpro-
tectioncircuitsagainst staticdischarge and transient
excess voltage.
DESCRIPTION
1/9
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