參數(shù)資料
型號: M4A3-96/48-55VC
廠商: LATTICE SEMICONDUCTOR CORP
元件分類: PLD
英文描述: High Performance E 2 CMOS In-System Programmable Logic
中文描述: EE PLD, 5.5 ns, PQFP100
封裝: TQFP-100
文件頁數(shù): 59/62頁
文件大?。?/td> 1078K
代理商: M4A3-96/48-55VC
62
ispMACH 4A Family
Revision History
2006 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
Date
Version
Change Summary
-
K
Previous Lattice release.
August 2006
L
Updated for lead-free package options.
September 2006
M
Revised M4A3-256/160 208-pin PQFP connection diagram.
相關PDF資料
PDF描述
M4A3-96/48-7VC High Performance E 2 CMOS In-System Programmable Logic
M4A3-96/48-7VI High Performance E 2 CMOS In-System Programmable Logic
M4A5-64/32-12VI48 High Performance E 2 CMOS In-System Programmable Logic
M4A5-64/32-55JC High Performance E 2 CMOS In-System Programmable Logic
M4A5-64/32-55VC High Performance E 2 CMOS In-System Programmable Logic
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