參數(shù)資料
型號(hào): M4A3-256/128-10VI
廠商: LATTICE SEMICONDUCTOR CORP
元件分類: PLD
英文描述: High Performance E 2 CMOS In-System Programmable Logic
中文描述: EE PLD, 10 ns, PQFP176
封裝: TQFP-176
文件頁數(shù): 34/61頁
文件大?。?/td> 1169K
代理商: M4A3-256/128-10VI
4
MACH 4 Family
GENERAL DESCRIPTION
The MACH 4 family from Lattice/Vantis offers an exceptionally exible architecture and delivers
a superior Complex Programmable Logic Device (CPLD) solution of easy-to-use silicon products
and software tools. The overall benets for users are a guaranteed and predictable CPLD
solution, faster time-to-market, greater exibility and lower cost. The MACH 4 devices offer
densities ranging from 32 to 512 macrocells with 100% utilization and 100% pin-out retention.
Both the MACH 4 and the MACH 4A families offer 5-V (M4-xxx and M4A5-xxx) and 3.3-V (M4LV-
xxx and M4A3-xxx) operation.
MACH 4 products are 5-V or 3.3-V in-system programmable through the JTAG (IEEE Std. 1149.1)
interface. JTAG boundary scan testing also allows product testability on automated test
equipment for device connectivity.
All MACH 4 family members deliver First-Time-Fit and easy system integration with pin-out
retention after any design change and ret. For both 3.3-V and 5-V operation, MACH 4 products
can deliver guaranteed xed timing as fast as 5.0 ns tPD and 182 MHz fCNT through the
SpeedLocking feature when using up to 20 product terms per output (Tables 3 and 4).
Note:
1. C = Commercial,
I = Industrial
Table 3. MACH 4 Speed Grades
Device
Speed Grade1
-7
-10
-12
-14
-15
-18
M4-32/32
M4LV-32/32
C
C, I
I
C
I
M4-64/32
M4LV-64/32
C
C, I
I
C
I
M4-96/48
M4LV-96/48
C
C, I
I
C
I
M4-128/64
M4LV-128/64
C
C, I
I
C
I
M4-128N/64
M4LV-128N/64
C
C, I
I
C
I
M4-192/96
M4LV-192/96
C
C, I
I
C
I
M4-256/128
M4LV-256/128
C
C, I
I
C
I
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