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參數(shù)資料
| 型號： | M48T513Y-70CS1 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDSO32 |
| 封裝： | SNAPHAT, PLASTIC, SO-44 |
| 文件頁數(shù)： | 7/31頁 |
| 文件大?。?/td> | 168K |
| 代理商： | M48T513Y-70CS1 |
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M48T513Y, M48T513V
Data Retention Mode
With valid VCC applied, the M48T513Y/V operates
as a conventional BYTEWIDE static RAM. Should
the supply voltage decay, the RAM will automati-
cally deselect, write protecting itself when VCC
falls between VPFD (max), VPFD (min) window. All
outputs become high impedance and all inputs are
treated as “don’t care.”
Note: A power failure during a WRITE cycle may
corrupt data at the current addressed location, but
does not jeopardize the rest of the RAM’s content.
At voltages below VPFD (min), the memory will be
in a write protected state, provided the VCC fall
time is not less than tF. The M48T513Y/V may re-
spond to transient noise spikes on VCC that cross
into the deselect window during the time the de-
vice is sampling VCC. Therefore, decoupling of the
power supply lines is recommended.
When VCC drops below VSO, the control circuit
switches power to the internal battery, preserving
data and powering the clock. The internal energy
source will maintain data in the M48T513Y/V for
an accumulated period of at least 10 years at room
temperature. As system power rises above VSO,
the battery is disconnected, and the power supply
is switched to external VCC. Deselect continues for
tREC after VCC reaches VPFD (max). For a further
more detailed review of lifetime calculations,
please see Application Note AN1012.
Figure 12. Power Down/Up Mode AC Waveforms
Table 9. Power Down/Up AC Characteristics
Note: 1. Valid for Ambient Operating Temperature: TA =0 to 70°C; VCC = 4.5 to 5.5V or 3.0 to 3.6V (except where noted).
2. VPFD (max) to VPFD (min) fall time of less than tF may result in deselection/write protection not occurring until 200ms after VCC pass-
es VPFD (min).
3. VPFD (min) to VSS fall time of less than tFB may cause corruption of RAM data.
Symbol
Parameter(1)
Min
Max
Unit
tF
(2)
VPFD (max) to VPFD (min) VCC Fall Time
300
s
tFB
(3)
VPFD (min) to VSS VCC Fall Time
M48T513Y
10
s
M48T513V
150
s
tR
VPFD (min) to VPFD (max) VCC Rise Time
0
s
tRB
VSS to VPFD (min) VCC Rise Time
1
s
tREC
VPFD (max) to RST High
40
200
ms
AI01805
VCC
INPUTS
OUTPUTS
DON’T CARE
HIGH-Z
tF
tFB
tR
tRB
VALID
RECOGNIZED
VPFD (max)
VPFD (min)
VSO
tREC
RST
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M48T513Y-70PM1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V-5V 4 Mbit 512Kb x8 TIMEKEEPER SRAM |
| M48T513Y-85CS1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V-5V 4 Mbit 512Kb x8 TIMEKEEPER SRAM |
| M48T513Y-85PM1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V-5V 4 Mbit 512Kb x8 TIMEKEEPER SRAM |
| M48T513YPM | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V-5V 4 Mbit 512Kb x8 TIMEKEEPER SRAM |
| M48T513YSH | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V-5V 4 Mbit 512Kb x8 TIMEKEEPER SRAM |
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