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參數(shù)資料
| 型號： | M48T37V-10MH6TR |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 時鐘/數(shù)據恢復及定時提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDSO44 |
| 封裝： | 0.330 INCH, ROHS COMPLIANT, PLASTIC, SOH-44 |
| 文件頁數(shù)： | 10/30頁 |
| 文件大?。?/td> | 515K |
| 代理商： | M48T37V-10MH6TR |
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Clock operations
M48T37Y, M48T37V
Doc ID 7019 Rev 9
3.9
Battery low flag
The M48T37Y/V automatically performs periodic battery voltage monitoring upon power-up.
The battery low flag (BL), bit D4 of the flags register 7FF0h, will be asserted high if the
SNAPHAT battery is found to be less than approximately 2.5 V. The BL flag will remain
active until completion of battery replacement and subsequent battery low monitoring tests
during the next power-up sequence.
If a battery low is generated during a power-up sequence, this indicates the battery voltage
is below 2.5 V (approximately), which may be insufficient to maintain data integrity. Data
should be considered suspect and verified as correct. A fresh battery should be installed.
The SNAPHAT top may be replaced while VCC is applied to the device.
Note:
This will cause the clock to lose time during the interval the battery/crystal is removed.
Battery monitoring is a useful technique only when performed periodically. The M48T37Y/V
only monitors the battery when a nominal VCC is applied to the device. Thus applications
which require extensive durations in the battery back-up mode should be powered-up
periodically (at least once every few months) in order for this technique to be beneficial.
Additionally, if a battery low is indicated, data integrity should be verified upon power-up via
a checksum or other technique.
3.10
Initial power-on defaults
Upon application of power to the device, the following register bits are set to a '0' state:
WDS; BMB0-BMB4; RB0-RB1; AFE; ABE; W; R; and FT (see Table 7).
Table 7.
Default values
3.11
VCC noise and negative going transients
ICC transients, including those produced by output switching, can produce voltage
fluctuations, resulting in spikes on the VCC bus. These transients can be reduced if
capacitors are used to store energy which stabilizes the VCC bus. The energy stored in the
bypass capacitors will be released as low going spikes are generated or energy will be
absorbed when overshoots occur. A ceramic bypass capacitor value of 0.1 F (as shown in
Figure 9) is recommended in order to provide the needed filtering.
In addition to transients that are caused by normal SRAM operation, power cycling can
generate negative voltage spikes on VCC that drive it to values below VSS by as much as
Condition
W
R
FT
AFE
ABE
Watchdog
register(1)
1.
WDS, BMB0-BMB4, RBO, RB1.
Initial power-up
(Battery attach for SNAPHAT)(2)
2.
State of other control bits undefined.
00
0
Subsequent power-up / RESET(3)
3.
State of other control bits remains unchanged.
00
0
Power-down(4)
4.
Assuming these bits set to '1' prior to power-down.
00
01
1
0
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M48T37V-70MH1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V-5V 256 Kbit 32Kb x8 TIMEKEEPER SRAM |
| M48T37V-70MH1E | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V-5V 256 Kbit 32Kb x8 TIMEKEEPER SRAM |
| M48T37V-70MH1F | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V-5V 256 Kbit 32Kb x8 TIMEKEEPER SRAM |
| M48T37V-70MH1TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V-5V 256 Kbit 32Kb x8 TIMEKEEPER SRAM |
| M48T37V-70MH6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V-5V 256 Kbit 32Kb x8 TIMEKEEPER SRAM |
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