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參數(shù)資料
| 型號： | M44C510D-XXX-DOW |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, MICROCONTROLLER |
| 封裝： | SSOP-44 |
| 文件頁數(shù)： | 10/60頁 |
| 文件大?。?/td> | 709K |
| 代理商： | M44C510D-XXX-DOW |
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M44C510E
Rev. A1, 04-May-00
Preliminary Information
18 (60)
Aux. Reg.
Subport 0
Subport 1
Subport Fh
Subport Eh
I/O bus
Aux. Reg.
Primary Reg.
Bank of
Primary Regs.
Primary Reg.
(Address Pointer)
Auxiliary Switch
Module
Indirect Subport
Access
Dual Register
Access
Single Register
Access
to other modules
Module M1
Module ASW
Module M2
Module M3
Address(M2) Address(ASW) OUT
Aux._Data
Address(M2) OUT
Prim._Data
Address(M2) OU T
(Primary Register Write)
Prim._Data Address(M3) O UT
(P rima ry Register Write)
Addr.(M1)
Addr.(ASW) OUT
Addr.(SPort) Addr.(M1)
OUT
1
2
(Subport Register Write)
SPort_Data
Addr.(M1)
OUT
3
4
5
6
1
2
3
4
7
5
6
Example of
qFORTH
Program
Code
Addr.(Mx) = Module Mx Addr ess
Aux._D ata = data to be written into Auxilia ry Register
Prim._D ata = da ta to be written into P rimary Register.
Addr.(M1)
Addr.(ASW) OUT
Addr.(SPort) Addr.(M1)
OUT
1
2
(Subport Register Read)
Addr.(M 1)
IN
Address(M2) Address(ASW) OUT
Address(M 2)
IN
(Auxiliary Register Rea d)
5
6
Address(M 2)
IN
(Primary Register Rea d)
4
Address(M1) Address(ASW) OUT
Address(M1) IN
(Auxiliary Register Rea d)
1
2
Address(M3) IN
(Prima ry Register Read)
7
Addr.(ASW) = Auxiliary Switch Module Address
Addr.(M1)
Addr.(ASW) OUT
Addr.(SPort) Addr.(M1)
OUT
1
2
(Subport Register Write Byte)
SPort_Data(lo) Addr.(M1) OUT
3
Addr.(M1)
Addr.(ASW) OUT
Addr.(SPort) Addr.(M1)
OUT
1
2
(Subport Register Rea d Byte)
Addr.(M 1)
IN
3
SPort_Data(hi) Addr.(M1) OUT
3
Addr.(M 1)
IN
3
SPort_Data(lo) = data to be written into SubP ort (low nibble)
SPort_Data(hi) = data to be written into Subport (high nibble)
Addr.(SPort) = Subport Address
Address(M2) Address(ASW) OUT
Aux._Data(lo) Address(M2) OUT
(Auxiliary Register Write Byte)
5
6
Aux._Data(hi) Address(M2) OUT
6
Aux._Data (lo)= data to be written into Auxilia ry Register (low nibble)
Aux._Data (hi) = da ta to be written into Auxiliary Register(high nibble)
3
( Auxiliary Register Write )
96 11522
Figure 17. Example of I/O addressing
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