參數(shù)資料
型號: M41T82RMY6E
廠商: STMICROELECTRONICS
元件分類: 時鐘/數(shù)據(jù)恢復(fù)及定時提取
英文描述: 1 TIMER(S), REAL TIME CLOCK, PDSO18
封裝: 0.300 INCH, ROHS COMPLIANT, PLASTIC, SOP-18
文件頁數(shù): 30/58頁
文件大?。?/td> 462K
代理商: M41T82RMY6E
Clock operation
M41T82 M41T83
3.6
Optional second programmable alarm
When the Alarm 2 Enable (AL2E) bit (D1 of address 13h) is set to a logic ‘1’, registers 14h
through 18h provide control for a second programmable alarm which operates in the same
manner as the alarm function described above. The A2IE (Alarm 2 Interrupt Enable) bit
allows the second alarm to trigger a separate interrupt output (IRQ2).
The AL2E bit defaults on initial power-up to a logic ‘0’ (Alarm 2 disabled). In this mode, the
five address bytes (14h-18h) function as additional user SRAM, for a total of 12 bytes of
user SRAM.
The IRQ1/FT/OUT pin can also be activated in the battery back-up mode (see Figure 22 on
Figure 21.
Alarm interrupt reset waveform
Figure 22.
Back-up mode alarm waveform
1.
ABE and A1IE bits = 1.
ALARM FLAG BITS (AFx)
0Fh
0Eh
00h
HIGH-Z
AI08898
IRQ1/FT/OUT or
IRQ2
VCC
IRQ1/FT/OUT or
IRQ2
AF Bit in Flags
Register
HIGH-Z
VSO
VPFD
trec
AI09164c
相關(guān)PDF資料
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