參數(shù)資料
型號: M41T00M6F
廠商: STMICROELECTRONICS
元件分類: 時鐘/數(shù)據(jù)恢復(fù)及定時提取
英文描述: REAL TIME CLOCK, PDSO8
封裝: 0.150 INCH, LEAD FREE, PLASTIC, SOIC-8
文件頁數(shù): 4/25頁
文件大小: 202K
代理商: M41T00M6F
Device operation
M41T00
2.9
WRITE mode
In this mode the master transmitter transmits to the M41T00 slave receiver. Bus protocol is
shown in Figure 10. Following the START condition and slave address, a logic '0' (R/W = 0)
is placed on the bus and indicates to the addressed device that word address An will follow
and is to be written to the on-chip address pointer. The data word to be written to the
memory is strobed in next and the internal address pointer is incremented to the next
memory location within the RAM on the reception of an acknowledge clock. The M41T00
slave receiver will send an acknowledge clock to the master transmitter after it has received
the slave address and again after it has received the word address and each data byte (see
Figure 10.
WRITE mode sequences
2.10
Data retention mode
With valid VCC applied, the M41T00 can be accessed as described above with READ or
WRITE cycles. Should the supply voltage decay, the M41T00 will automatically deselect,
WRITE protecting itself when VCC falls (see Figure 11).
Figure 11. Power down/up mode AC waveforms
AI00591
BUS ACTIVITY:
ACK
S
ACK
STOP
START
P
SDA LINE
BUS ACTIVITY:
MASTER
R/W
DATA n
DATA n+1
DATA n+X
WORD
ADDRESS (An)
SLAVE
ADDRESS
AI00596
VCC
tREC
tPD
VSO
SDA
SCL
DON'T CARE
Table 3.
RTC power down/up ac characteristics
Symbol
Parameter(1)(2)
Min
Typ
Max
Unit
tPD
SCL and SDA at VIH before power down
0
ns
trec
SCL and SDA at VIH after power up
10
s
1.
Valid for ambient operating temperature: TA = -40 to 85°C; VCC = 2.0 to 5.5 V (except where otherwise noted).
2.
VCC fall time should not exceed 5 mV/s.
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