參數(shù)資料
型號(hào)： M4-96/48-12VC
廠商： LATTICE SEMICONDUCTOR CORP
元件分類(lèi)： PLD
英文描述： High Performance E 2 CMOS In-System Programmable Logic
中文描述： EE PLD, 12 ns, PQFP100
封裝： TQFP-100
文件頁(yè)數(shù)： 46/46頁(yè)
文件大?。?/td> 754K
代理商： M4-96/48-12VC
MACH 4 Family
9
Note that the conguration of the logic allocator has absolutely no impact on the speed of the
signal. All congurations have the same delay. This means that designers do not have to decide
between optimizing resources or speed; both can be optimized.
If not used in the cluster, the extra product term can act in conjunction with the basic cluster to
provide XOR logic for such functions as data comparison, or it can work with the D-,T-type ip-
op to provide for J-K, and S-R register operation. In addition, if the basic cluster is routed to
another macrocell, the extra product term is still available for logic. In this case, the rst XOR
input will be a logic 0. This circuit has the exibility to route product terms elsewhere without
giving up the use of the macrocell.
Product term clusters do not “wrap” around a PAL block. This means that the macrocells at the
ends of the block have fewer product terms available.
0
17466G-007
Figure 3. Logic Allocator Congurations: Synchronous Mode
a. Basic cluster with XOR
b. Extended cluster, active high
c. Extended cluster, active low
d. Basic cluster routed away;
single-product-term, active high
e. Extended cluster routed away
0
17466G-008
Figure 4. Logic Allocator Congurations: Asynchronous Mode
b. Extended cluster, active high
c. Extended cluster, active low
e. Extended cluster routed away
d. Basic cluster routed away;
single-product-term, active high
a. Basic cluster with XOR
相關(guān)PDF資料
PDF描述
M4-96/48-12VI High Performance E 2 CMOS In-System Programmable Logic
M4-96/48-15VC High Performance E 2 CMOS In-System Programmable Logic
M4-96/48-18VI High Performance E 2 CMOS In-System Programmable Logic
M4-96/48-7VC High Performance E 2 CMOS In-System Programmable Logic
M4LV-128N/64-10JC High Performance E 2 CMOS In-System Programmable Logic
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