參數資料
型號： M38K27M4-XXXHP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP64
封裝： 10 X 10 MM, 0.50 MM PITCH, PLASTIC, LQFP-64
文件頁數： 135/160頁
文件大小： 2177K
代理商： M38K27M4-XXXHP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
38K2 Group
75
EXB Register List
The EXB register list is shown below.
Fig. 107 EXB related registers (1)
EXB interrupt source enable register
This register enables/disables access from an external bus and an
internal interrupt.
EXB interrupt source register
This register indicates the state of CPU channel’s transmit/receive
buffer register and the memory channel. The same value can be
read out from the external MCU bus by using the buffer status
read select signal (A1 pin = “H”).
EXB index register/Register windows 1, 2
The accessible register is switched by treating addresses 003416
and 003516 as a register window depending on the value of EXB
index register at address 003316.
External I/O configuration register
This register selects the function of each pin.
Transmit/Receive buffer register
This register consists of the receive buffer register (RXBUF) and
the transmit buffer register (TXBUF)
Memory channel operation mode register
This register sets the operation mode of the memory channel.
Memory address counter
This is a counter to set the beginning address which FIFO ac-
cesses. This register is increased by access from the external
MCU bus.
End address register
This register is to set the end address which FIFO accesses.
MC_ENB
TXB_ENB
RXB_EMB
MC_STS[1:0]
TXB_EMPTY
RXB_FULL
INDEX[2:0]
0 : “0” fixed
: Not used
LOW_WIN[7:0]
HIGH_WIN[7:0]
EXB SFR
SYMBOL
bit7
bit6
bit5
bit4
bit3
00000
bit2
bit1
bit0
EXBICON
EXBIREQ
EXBINDEX
EXBREG1
EXBREG2
003016
003116
003316
003416
003516
EXB interrupt source enable register
EXB interrupt source register
Register window 1 (low)
Register window 2 (high)
EXB index register
Address
Register Name
Index
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
0016
low
A1_CTR
INT_CTR[2:0]
EXB_CTR
high
TC_CTR
DAK_CTR[1:0]
DRQ_CTR[1:0]
0116
low
At CPU read : RXBUF[7:0]
At CPU write : TXBUF[7:0]
high
0216
low
BURST
MC_DIR[1:0]
high
0316
low
IM_A[7:0]
high
00000
IM_A[10:8]
0416
low
END_A[7:0]
high
00000
END_A[10:8]
External I/O configu-
ration register
Transmit/Receive
buffer register
Memory channel ope-
ration mode register
Memory address
counter
End address
register
EXB SFR
Register Name
SYMBOL
EXBCFGL
EXBCFGH
RXBUF/TXBUF
MCHMOD
—
MEMADL
MEMADH
ENDADL
ENDADH
0 : “0” fixed
: Not used
Fig. 108 EXB related registers (2)
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