參數(shù)資料
型號: M38C13E6FP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PQFP64
封裝: 14 X 14 MM, PLASTIC, LQFP-64
文件頁數(shù): 18/59頁
文件大?。?/td> 955K
代理商: M38C13E6FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
38C1 Group
25
Serial I/O
The serial I/O function can be used only for clock synchronous se-
rial I/O.
For clock synchronous serial I/O, the transmitter and the receiver
must use the same clock. When the internal clock is used, transfer
is started by a write signal to the serial I/O register.
[Serial I/O Control Register (SIOCON)] 001D16
The serial I/O control register contains 8 bits which control various
serial I/O functions.
s Notes on Serial I/O
Write data to the serial I/O register only when the SCLK pin is “H”.
Fig. 22 Structure of serial I/O control register
Fig. 23 Block diagram of serial I/O function
Serial I/O control register
(SIOCON : address 001D16, initial value: 0016)
b7
Internal synchronous clock select bits
0 0 0: f(XIN)/8
0 0 1: f(XIN)/16
0 1 0: f(XIN)/32
0 1 1: f(XIN)/64
1 0 0:
1 0 1:
1 1 0: f(XIN)/128
1 1 1: f(XIN)/256
Serial I/O port selection bit
0: I/O port
1: SOUT,SCLK signal output
P55/SOUT P-channel output disable bit
0: CMOS output (in output mode)
1: N-channel open-drain output
(in output mode)
Transfer direction selection bit
0: LSB first
1: MSB first
Synchronous clock selection bit
0: External clock
1: Internal clock
SRDY output selection bit
0: I/O port P57
1: SRDY signal output
b0
b2 b1 b0
Do not set
Note:
φSOURCE represents the oscillation frequency of
XIN input in the middle- and high-speed mode,
built-in ring oscillator in the ring oscillator mode,
and sub-clock in the low-speed mode.
"1"
"0"
"1"
"0"
"1"
S
C
L
K
1/8
1/16
1/32
1/64
1/128
1/256
P54/SIN
P56/SCLK
P55/SOUT
P57/SRDY
(Note)
φSOURCE
Data bus
Serial I/O
interrupt request
Serial I/O port selection bit
Serial I/O counter (3)
Serial I/O register (8)
Synchronous circuit
Synchronous clock
selection bit
External clock
Internal synchronous
clock select bits
D
iv
id
e
r
P56 latch
P55 latch
Note: It is selected by the synchronous clock selection bit, the
SRDY output selection bit, and the serial I/O port selection
bit.
P57 latch
(Note)
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