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| 型號(hào)： | M38B59EFFS |
| 廠商： | Mitsubishi Electric Corporation |
| 元件分類(lèi)： | DC/DC變換器 |
| 英文描述： | 1 watt dc-dc converters |
| 中文描述： | 1瓦的DC - DC轉(zhuǎn)換器 |
| 文件頁(yè)數(shù)： | 58/355頁(yè) |
| 文件大?。?/td> | 3340K |
| 代理商： | M38B59EFFS |
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38B5 Group User’s Manual
1-42
HARDWARE
FUNCTIONAL DESCRIPTION
Fig. 43 Segment/Digit setting example
FLD automatic display pins
When the automatic display control bits of the FLDC mode register
(address 0EF4
16
) are set to “1,” the ports of P0, P1, P2, P3 and P8
are used as FLD automatic display pins.
When using the FLD automatic display mode, set each port to the
FLD pin or the general-purpose port using the respective switch reg-
ister in accordance with the number of segments and the number of
digits.
This setting is performed by writing a value into the FLD/port switch
register (addresses 0EF9
16
to 0EFB
16
) of each port.
This setting can be performed in units of bit. When “0” is set, the port
is set to the general-purpose port. When “1” is set, the port is set to
the FLD pin. There is no restriction on whether the FLD pin is to be
used as a segment pin or a digit pin.
Table 9 Pins in FLD automatic display mode
Port Name
Automatic Display Pins
Setting Method
P0, P2,
P8
0
–P8
3
P1, P3
P8
4
–P8
7
FLD
0
–FLD
15
FLD
32
–FLD
35
FLD
16
–FLD
31
FLD
36
–FLD
39
The individual bits of the FLD/port switch register (addresses 0EF9
16
–0EFB
16
) can be set each pin
either FLD port (“1”) or general-purpose port (“0”).
None (FLD only)
The individual bits of the FLD/port switch register (address 0EFB
16
) can be set each pin to either
FLD port (“1”) or general-purpose port (“0”).
The output can be reversed by the port P8 FLD output control register (address 0EFC
16
).
The port output format is the CMOS output format. When using the port as a display pin, a driver
must be installed externally.
15
8
P2
4
P2
5
P2
6
P2
7
P2
0
P2
1
P2
2
P2
3
0
0
0
0
0
0
0
0
FLD
16
(DIG
1
)
FLD
17
(DIG
2
)
FLD
18
(DIG
3
)
FLD
19
(DIG
4
)
FLD
20
(SEG
4
)
FLD
21
(SEG
5
)
FLD
22
(SEG
6
)
FLD
23
(SEG
7
)
P0
4
P0
5
FLD
14
(SEG
2
)
FLD
15
(SEG
3
)
FLD
8
(SEG
1
)
P0
1
P0
2
P0
3
1
0
0
0
0
0
1
1
FLD
32
(SEG
12
)
FLD
33
(SEG
13
)
FLD
34
(SEG
14
)
FLD
35
(SEG
15
)
P8
4
P8
5
P8
6
P8
7
FLD
24
(SEG
8
)
FLD
25
(SEG
9
)
FLD
26
(SEG
10
)
FLD
27
(SEG
11
)
FLD
28
(DIG
5
)
FLD
29
(DIG
6
)
FLD
30
(DIG
7
)
FLD
31
(DIG
8
)
1
1
1
1
0
0
0
0
25
15
FLD
8
(SEG
9
)
FLD
9
(SEG
10
)
FLD
10
(SEG
11
)
FLD
11
(SEG
12
)
FLD
12
(SEG
13
)
FLD
13
(SEG
14
)
FLD
14
(SEG
15
)
FLD
15
(SEG
16
)
1
1
1
1
1
1
1
1
FLD
0
(SEG
1
)
FLD
1
(SEG
2
)
FLD
2
(SEG
3
)
FLD
3
(SEG
4
)
FLD
4
(SEG
5
)
FLD
5
(SEG
6
)
FLD
6
(SEG
7
)
FLD
7
(SEG
8
)
FLD
16
(DIG
1
)
FLD
17
(DIG
2
)
FLD
18
(DIG
3
)
FLD
19
(DIG
4
)
FLD
20
(DIG
5
)
FLD
21
(DIG
6
)
FLD
22
(DIG
7
)
FLD
23
(DIG
8
)
1
1
1
1
1
1
1
1
FLD
24
(DIG
9
)
FLD
25
(DIG
10
)
FLD
26
(DIG
11
)
FLD
27
(DIG
12
)
FLD
28
(DIG
13
)
FLD
29
(DIG
14
)
FLD
30
(DIG
15
)
FLD
31
(SEG
17
)
FLD
32
(SEG
18
)
FLD
33
(SEG
19
)
FLD
34
(SEG
20
)
FLD
35
(SEG
21
)
FLD
36
(SEG
22
)
FLD
37
(SEG
23
)
FLD
38
(SEG
24
)
FLD
39
(SEG
25
)
1
1
1
1
1
1
1
1
18
20
FLD
8
(DIG
1
)
FLD
9
(DIG
2
)
FLD
10
(DIG
3
)
FLD
11
(DIG
4
)
FLD
12
(DIG
5
)
FLD
13
(DIG
6
)
FLD
14
(DIG
7
)
FLD
15
(DIG
8
)
1
1
1
1
1
1
FLD
2
(SEG
1
)
FLD
3
(SEG
2
)
FLD
4
(SEG
3
)
FLD
5
(SEG
4
)
FLD
6
(SEG
5
)
FLD
7
(SEG
6
)
FLD
16
(DIG
9
)
FLD
17
(DIG
10
)
FLD
18
(DIG
11
)
FLD
19
(DIG
12
)
FLD
20
(DIG
13
)
FLD
21
(DIG
14
)
FLD
22
(DIG
15
)
FLD
23
(DIG
16
)
1
1
1
1
1
1
1
1
FLD
24
(DIG
17
)
FLD
25
(DIG
18
)
FLD
26
(DIG
19
)
FLD
27
(DIG
20
)
FLD
28
(SEG
7
)
FLD
29
(SEG
8
)
FLD
30
(SEG
9
)
FLD
31
(SEG
10
)
FLD
32
(SEG
11
)
FLD
33
(SEG
12
)
FLD
34
(SEG
13
)
FLD
35
(SEG
14
)
FLD
36
(SEG
15
)
FLD
37
(SEG
16
)
FLD
38
(SEG
17
)
FLD
39
(SEG
18
)
1
1
1
1
1
1
1
1
16
10
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
1
1
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
P2
0
P2
1
P2
2
P2
3
P2
4
P2
5
FLD
4
(SEG
1
)
FLD
5
(SEG
2
)
FLD
6
(SEG
3
)
FLD
7
(SEG
4
)
FLD
8
(SEG
5
)
FLD
9
(SEG
6
)
FLD
10
(SEG
7
)
FLD
11
(SEG
8
)
FLD
12
(SEG
9
)
FLD
13
(SEG
10
)
FLD
14
(SEG
11
)
FLD
15
(SEG
12
)
FLD
26
(SEG
13
)
FLD
27
(SEG
14
)
FLD
28
(SEG
15
)
FLD
29
(SEG
16
)
FLD
16
(DIG
1
)
FLD
17
(DIG
2
)
FLD
18
(DIG
3
)
FLD
19
(DIG
4
)
FLD
20
(DIG
5
)
FLD
21
(DIG
6
)
FLD
22
(DIG
7
)
FLD
23
(DIG
8
)
FLD
24
(DIG
9
)
FLD
25
(DIG
10
)
P8
1
P8
2
P8
3
P8
4
P8
5
P8
6
P8
7
P8
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
P2
0
P2
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
Number of segments
Port P2
Setting example 1
Setting example 2
Setting example 3
Setting example 4
Port P0
Port P1
Port P3
Port P8
Value of FLDRAM write disable register
If data is set to “1”, data is protected.
Value of FLD/port switch register
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