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    • 參數(shù)資料
      型號(hào): M38B42MEH-XXXXFP
      廠商: Mitsubishi Electric Corporation
      英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
      中文描述: 單芯片8位CMOS微機(jī)
      文件頁(yè)數(shù): 3/78頁(yè)
      文件大小: 1214K
      代理商: M38B42MEH-XXXXFP
      3
      38B4 Group
      SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
      MITSUBISHI MICROCOMPUTERS
      PIN DESCRIPTION
      Table 1 Pin description (1)
      Pin
      Name
      Function
      V
      CC
      , V
      SS
      V
      EE
      Power source
      Pull-down
      power source
      Reference
      voltage
      Analog power
      source
      Reset input
      Clock input
      Apply voltage of 4.0–5.5 V to V
      CC
      ,
      and 0 V to V
      SS
      .
      Apply voltage supplied to pull-down resistors of ports P0, P1, and P3.
      V
      REF
      Reference voltage input pin for A-D converter.
      AV
      SS
      Analog power source input pin for A-D converter.
      Connect to V
      SS
      .
      Reset input pin for active “L”.
      Input and output pins for the main clock generating circuit.
      Feedback resistor is built in between X
      IN
      pin and X
      OUT
      pin.
      Connect a ceramic resonator or quartz-crystal oscillator between the X
      IN
      and X
      OUT
      pins to set the
      oscillation frequency.
      When an external clock is used, connect the clock source to the X
      IN
      pin and leave the X
      OUT
      pin open.
      The clock is used as the oscillating source of system clock.
      8-bit I/O port.
      I/O direction register allows each pin to be individually programmed as either
      input or output.
      At reset, this port is set to input mode.
      A pull-down resistor is built in between port P0 and the V
      EE
      pin.
      CMOS compatible input level.
      High-breakdown-voltage P-channel open-drain output structure.
      At reset, this port is set to V
      EE
      level.
      8-bit output port.
      A pull-down resistor is built in between port P1 and the V
      EE
      pin.
      High-breakdown-voltage P-channel open-drain output structure.
      At reset, this port is set to V
      EE
      level.
      8-bit I/O port with the same function as port P0.
      Low-voltage input level.
      High-breakdown-voltage P-channel open-drain output structure.
      8-bit output port.
      A pull-down resistor is built in between port P3 and the V
      EE
      pin.
      High-breakdown-voltage P-channel open-drain output structure.
      At reset, this port is set to V
      EE
      level.
      7-bit I/O port with the same function as port P0.
      CMOS compatible input level
      N-channel open-drain output structure.
      RESET
      X
      IN
      P0
      0
      /FLD
      8
      P0
      7
      /FLD
      15
      I/O port P0
      FLD automatic display
      pins
      P1
      0
      /FLD
      16
      – Output port P1
      P1
      7
      /FLD
      23
      FLD automatic display
      pins
      P2
      0
      /B
      UZ02
      /
      FLD
      0
      P2
      7
      /FLD
      7
      P3
      0
      /FLD
      24
      – Output port P3
      P3
      7
      /FLD
      31
      I/O port P2
      FLD automatic display
      pins
      Buzzer output pin (P2
      0
      )
      FLD automatic display
      pins
      P4
      0
      /INT
      0
      ,
      P4
      1
      /INT
      1
      ,
      P4
      2
      /INT
      3
      P4
      3
      /B
      UZ01
      P4
      4
      /PWM
      1
      I/O port P4
      Interrupt input pins
      In the mask option type P,
      INT
      3
      cannot be used.
      Buzzer output pin
      PWM output pin
      (Timer output pin)
      Timer output pin
      P4
      5
      /T
      1OUT
      ,
      P4
      6
      /T
      3OUT
      P4
      7
      /INT
      2
      Input port P4
      1-bit input port.
      CMOS compatible input level.
      Interrupt input pin
      Function except a port function
      X
      OUT
      Clock output
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