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參數(shù)資料
| 型號： | M38503M4A-XXXSP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 12.5 MHz, MICROCONTROLLER, PDIP42 |
| 封裝： | 0.600 INCH, 1.78 MM PITCH, SHRINK, PLASTIC, DIP-42 |
| 文件頁數(shù)： | 10/99頁 |
| 文件大?。?/td> | 1419K |
| 代理商： | M38503M4A-XXXSP |
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18
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
I/O PORTS
The I/O ports have direction registers which determine the input/
output direction of each individual pin. Each bit in a direction
register corresponds to one pin, and each pin can be set to be
input port or output port.
When “0” is written to the bit corresponding to a pin, that pin
becomes an input pin. When “1” is written to that bit, that pin
becomes an output pin.
If data is read from a pin which is set to output, the value of the
port output latch is read, not the value of the pin itself. Pins set to
input are floating. If a pin set to input is written to, only the port
output latch is written to and the pin remains floating.
Pin
Name
Input/Output
I/O Structure
Non-Port Function
Table 9 I/O port function (spec. A)
Related SFRs
Port P0
Port P1
Port P2
P00/SIN2
P01/SOUT2
P02/SCLK2
P03/SRDY2
P04/AN5–P07AN8
P10–P17
P20/XCOUT
P21/XCIN
P22
P23
P24/RxD
P25/TxD
P26/SCLK
P27/CNTR0/SRDY1
P30/AN0–
P34/AN4
P40/CNTR1
P41/INT0
P42/INT1
P43/INT2/SCMP2
P44/INT3/PWM
CMOS compatible
input level
CMOS 3-state output
Serial I/O2 control register
CMOS compatible
input level
CMOS 3-state output
Input/output,
individual
bits
Ref.No.
(1)
(2)
(3)
(4)
CMOS compatible
input level
N-channel open-drain
output
Port P3
Port P4
(Note)
Note: When bits 5 to 7 of Ports P3 and P4 are read out, the contents are undefined.
3850 Group (Spec. A)
By setting the port P0, P1, P2 pull-up control register (address
001216), the port P3 pull-up control register (address 001316), or
the port P4 pull-up control register (address 001416), ports can
control pull-up with a program. However, the contents of these
registers do not affect ports programmed as the output ports.
Serial I/O2 function I/O
A-D conversion input
Sub-clock generating
circuit
Serial I/O1 function I/O
Timer X function I/O
A-D conversion input
Timer Y function I/O
External interrupt input
SCMP2 output
External interrupt input
PWM output
A-D control register
A-D input selection register
CPU mode register
Serial I/O1 control register
Timer XY mode register
A-D control register
A-D input selection register
Timer XY mode register
Interrupt edge selection
register
Interrupt edge selection
register
Serial I/O2 control register
Interrupt edge selection
register
PWM control register
(13)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(12)
(13)
(14)
(15)
(16)
(17)
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