- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370923 > M38275M2-XXXFP (Mitsubishi Electric Corporation) Quad Low-Power Rail-to-Rail Input/Output Op Amp 14-SOIC 0 to 70 PDF資料下載
參數(shù)資料
| 型號： | M38275M2-XXXFP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | Quad Low-Power Rail-to-Rail Input/Output Op Amp 14-SOIC 0 to 70 |
| 中文描述： | 單芯片8位CMOS微機 |
| 文件頁數(shù)： | 41/70頁 |
| 文件大小： | 1112K |
| 代理商： | M38275M2-XXXFP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁當前第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁
41
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
3827 Group
WATCHDOG TIMER
The watchdog timer gives a mean of returning to the reset status
when a program cannot run on a normal loop (for example, be-
cause of a software runaway).
The watchdog timer consists of an 8-bit watchdog timer L and a 6-
bit watchdog timer H. At reset or writing to the watchdog timer
control register (address 0037
16
), the watchdog timer is set to
“3FFF
16
.” When any data is not written to the watchdog timer con-
trol register (address 0037
16
) after reset, the watchdog timer is in
stop state. The watchdog timer starts to count down from “3FFF
16
”
by writing an optional value into the watchdog timer control regis-
ter (address 0037
16
) and an internal reset occurs at an underflow.
Accordingly, programming is usually performed so that writing to
the watchdog timer control register (address 0037
16
) may be
started before an underflow. The watchdog timer does not function
when an optional value have not written to the watchdog timer
control register (address 0037
16
). When address 0037
16
is read,
the following values are read:
G
value of high-order 6-bit counter
G
value of STP instruction disable bit
G
value of count source selection bit.
When bit 6 of the watchdog timer control register (address 0037
16
)
is set to “0,” the STP instruction is valid. The STP instruction is dis-
abled by rewriting this bit to “1.” At this time, if the STP instruction
is executed, it is processed as an undefined instruction, so that a
reset occurs inside.
This bit cannot be rewritten to “0” by programming. This bit is “0”
immediately after reset.
The count source of the watchdog timer becomes the system
clock
φ
divided by 8. The detection time in this case is set to 8.19 s
at X
CIN
= 32 kHz and 65.536 ms at X
IN
= 4 MHz.
However, count source of high-order 6-bit timer can be connected
to a signal divided system clock by 8 directly by writing the bit 7 of
the watchdog timer control register (address 0037
16
) to “1.” The
detection time in this case is set to 32 ms at X
CIN
= 32 kHz and
256
μ
s at X
IN
= 4 MHz. There is no difference in the detection time
between the middle-speed mode and the high-speed mode.
Fig. 44 Block diagram of watchdog timer
Fig. 45 Structure of watchdog timer control register
Fig. 46 Timing of reset output
X
IN
Data bus
X
CIN
“1”
“0”
Internal
system clock
selection bit
“0”
“1”
1/16
Watchdog timer
H (6)
Watchdog timer count
source selection bit
Reset circuit
Undefined instruction
Reset
“3F
16
” is set when
watchdog timer is
written to.
Internal reset
RESET
IN
Reset release time wait
Watchdog timer
L (8)
“FF
16
” is set when
watchdog timer is
written to.
STP instruction
STP instruction disable bit
Watchdog timer H (for read-out of high-order 6 bit)
“3FFF
16
” is set to the watchdog timer by writing values to this address.
Watchdog timer H count source selection bit
0 : Internal system clock/2048 (f(X
IN
)/4096)
1 : Internal system clock/8 (f(X
IN
)/16)
STP instruction disable bit
0 STP instruction enabled
1 : STP instruction disabled
b7
Watchdog timer register (address 0037
16
)
WDTCON
b0
Internal
reset signal
Watchdog timer detection
2
ms
(f(X
IN
) = 4MH
Z
)
f(X
IN)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M38275M2-XXXFS | Quad Low-Power Rail-to-Rail Input/Output Op Amp 14-PDIP 0 to 70 |
| M38275M2-XXXGP | Quad Low-Power Rail-to-Rail Input/Output Op Amp 14-PDIP 0 to 70 |
| M38275M2-XXXHP | Quad Low-Power Rail-to-Rail Input/Output Op Amp 14-HTSSOP 0 to 70 |
| M38275MCMXXXFS | Quad Low-Power Rail-to-Rail Input/Output Op Amp w/Shutdown 16-SOIC -40 to 125 |
| M38275MCMXXXGP | Quad Low-Power Rail-to-Rail Input/Output Op Amp w/Shutdown 16-PDIP -40 to 125 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M3828 BK001 | 制造商:Alpha Wire Company 功能描述:CBL 3COND 16AWG BLK 1000' |
| M3828 BK002 | 制造商:Alpha Wire Company 功能描述:CBL 3COND 16AWG BLK 500' |
| M3828 BK005 | 制造商:Alpha Wire Company 功能描述:CBL 3COND 16AWG BLK 100' |
| M3828 BK199 | 制造商:Alpha Wire Company 功能描述:CBL 3COND 16AWG BLK 3000=3000' |
| M3829 BK001 | 制造商:Alpha Wire Company 功能描述:CBL 4COND 16AWG BLK 1000' |
發(fā)布緊急采購，3分鐘左右您將得到回復。