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APPLICATION
2.2 Interrupts
2–16
3825 GROUP USER’S MANUAL
INT0
INT1
Serial I/O receive
Serial I/O transmit
Timer X
Timer Y
Timer 2
Timer 3
CNTR0
CNTR1
Timer 1
INT2
INT3
Key input
(Key-on wake up)
ADT
A-D conversion
BRK instruction
Reference
Interrupt request generating conditions
Interrupt sources
Table 2.2.1 Interrupt sources and interrupt request generating conditions
At detection of either rising or falling edge of INT0 input
(Active edge selectable)
At detection of either rising or falling edge of INT1 input
(Active edge selectable)
At completion of serial I/O data reception
At completion of serial I/O transmit shift or when transmit
buffer register is empty
At timer X underflow
At timer Y underflow
At timer 2 underflow
At timer 3 underflow
At detection of either rising or falling edge of CNTR0
input (Active edge selectable)
At detection of either rising or falling edge of CNTR1
input (Active edge selectable)
At timer 1 underflow
At detection of either rising or falling edge of INT2 input
(Active edge selectable)
At detection of either rising or falling edge of INT3 input
(Active edge selectable)
At falling of conjunction of input level for port P2 (at
input mode)
At detection of falling edge of ADT input
At completion of A-D conversion
At BRK instruction execution
(1) Interrupt request generating conditions
Table 2.2.1 shows interrupt sources and interrupt request generating conditions.
The occurrence of an interrupt request causes the corresponding interrupt request bit to be set to “1.”
When the following conditions are satisfied in this state, the interrupt request is accepted.
For details, refer to “2.2.2 Control”.
Interrupt disable flag = “0” (interrupts enabled)
Interrupt enable bit = “1” (interrupts enabled)
2.2.4 INT interrupts
2.5 Serial I/O1
2.3 Timer X and timer Y
2.4 Timer 1, timer 2, and timer 3
2.3 Timer X and timer Y
2.4 Timer 1, timer 2, and timer 3
2.2.4 INT interrupts
2.2.5 Key input interrupt
2.6 A-D converter
SERIES 740 <SOFTWARE>
USER’S MANUAL