參數(shù)資料
型號(hào)： M38233GC-XXXFP
廠商： Renesas Technology Corp.
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機(jī)
文件頁數(shù)： 14/76頁
文件大?。?/td> 896K
代理商： M38233GC-XXXFP
Rev.2.02 Jun 19, 2007 page 14 of 73
REJ03B0146-0202
3823 Group
MEMORY
Special Function Register (SFR) Area
The Special Function Register area in the zero page contains con-
trol registers such as I/O ports and timers.
RAM
RAM is used for data storage and for stack area of subroutine
calls and interrupts.
ROM
The first 128 bytes and the last 2 bytes of ROM are reserved for
device testing and the rest is user area for storing programs.
Interrupt Vector Area
The interrupt vector area contains reset and interrupt vectors.
Zero Page
The 256 bytes from addresses 0000
16
to 00FF
16
are called the
zero page area. The internal RAM and the special function regis-
ter (SFR) are allocated to this area.
The zero page addressing mode can be used to specify memory
and register addresses in the zero page area. Access to this area
with only 2 bytes is possible in the zero page addressing mode.
Special Page
The 256 bytes from addresses FF00
16
to FFFF
16
are called the
special page area. The special page addressing mode can be
used to specify memory addresses in the special page area.
Access to this area with only 2 bytes is possible in the special
page addressing mode.
Fig. 10 Memory map diagram
6
4
0
7
6
8
1
5
3
6
2
0
4
8
2
5
6
0
0
2
B
F
1
6
0
3
3
F
1
6
0
6
3
F
1
6
0
8
3
F
1
6
0
A3
F
1
6
RAM area
R
A
(
b
M
y
e
s
i
z
)
e
t
s
A
X
d
X
d
r
e
X
1
s
s
6
X
1
6
3
8
4
2
4
5
7
6
3
2
7
6
8
4
9
1
5
2
6
1
4
4
0
C
0
0
0
1
6
A
0
0
0
1
6
8
0
0
0
1
6
4
0
0
0
1
6
10
0
0
1
6
C
0
8
0
1
6
A
0
8
0
1
6
8
0
8
0
1
6
4
0
8
0
1
6
10
8
0
1
6
R
O
M
a
r
e
a
R
O
(
b
M
y
e
s
i
z
)
e
t
s
A
Y
d
Y
d
Y
r
e
Y
1
s
s
6
A
Z
d
Z
d
Z
r
e
Z
1
s
s
6
0100
16
0000
16
0040
16
0A40
16
FF00
16
F
D
C
1
6
FFFE
16
FFFF
16
XXXX
16
ZZZZ
16
RAM
R
O
M
RAM for ROM correction
SFR area
N
o
t
u
s
e
d
Interrupt vector area
R
e
s
e
r
v
e
d
R
O
M
a
r
e
a
Zero page
S
p
e
c
i
a
l
p
a
g
e
R
e
s
e
r
v
e
d
R
O
M
a
r
e
a
0050
16
LCD display RAM area
R
A
M
1
f
o
r
R
O
M
c
o
r
r
e
c
t
i
o
n
R
A
M
2
f
o
r
R
O
M
c
o
r
r
e
c
t
i
o
n
0A00
16
0A1F
16
0
2
A
0
1
6
0
A
3
F
1
6
Y
Y
Y
1
6
ROM Code Protect Address
“00
16
” is written into ROM code protect address (other than the
user ROM area) when selecting the protect bit write by using a se-
rial programmer or selecting protect enabled for writing shipment
by Renesas Technology corp.. When “00
16
” is set to the ROM
code protect address, the protect function is enabled, so that read-
ing or writing from/to QzROM is disabled by a serial programmer.
As for the QzROM product in blank, the ROM code is protected by
selecting the protect bit write at ROM writing with a serial pro-
grammer.
As for the QzROM product shipped after writing, “00
16
” (protect
enabled) or “FF
16
” (protect disabled) is written into the ROM code
protect address when Renesas Technology corp. performs writing.
The writing of “00
16
" or “FF
16
” can be selected as ROM option
setup (“MASK option” written in the mask file converter) when or-
dering.
相關(guān)PDF資料
PDF描述
M38233GC-XXXHP 36 Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V
M38233GD-XXXFP 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V
M38233GD-XXXHP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
M38233GE-XXXFP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
M38233GE-XXXHP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
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