參數(shù)資料
型號(hào): M38232GA-XXXHP
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述: 單芯片8位CMOS微機(jī)
文件頁(yè)數(shù): 35/76頁(yè)
文件大?。?/td> 896K
代理商: M38232GA-XXXHP
Rev.2.02 Jun 19, 2007 page 35 of 73
REJ03B0146-0202
3823 Group
(3) Synchronous/Asynchronous Alternate
Transmit Mode
Synchronous/asynchronous alternate transmit mode is selected
by setting the transmit enable bit in the serial I/O control register to
“1” after setting the synchronous serial I/O output pin selection bit
in the peripheral function expansion register to “1”. Set the syn-
chronous serial I/O output pin selection bit to “1” when the serial I/
O mode selection bit is set to “0”. In this mode, transmit cannot be
performed continuously. Write to the transmit buffer register after
Fig. 30 Block diagram of synchronous/asynchronous alternate transmit
Fig. 31 Operation of synchronous/asynchronous alternate transmit function
confirming that the transmit shift register is set to “1”, and then
changing the serial I/O mode selection bit. The S
RDY
output func-
tion cannot be used when the clock synchronous serial I/O is
selected. Also, when using the internal clock for the transfer clock
(the serial I/O synchronous clock selection bit is set to “0”), apply
“H” output to the P4
6
pin. The other operation is the same as clock
synchronous serial I/O mode and asynchronous serial I/O mode
(UART).
1/4
1
/
4
S
e
r
i
a
l
I
/
O
s
t
a
t
u
s
r
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g
i
s
t
e
r
P4
5
/T
X
D
N
o
t
e
:
f
(
S
U
B
)
i
s
t
h
e
s
o
u
r
c
e
o
s
c
i
l
l
a
t
i
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n
f
r
e
q
u
e
n
c
y
i
n
l
o
w
-
s
p
e
e
d
m
o
d
e
.
f
(
S
U
B
)
s
h
o
w
s
t
h
e
o
s
c
i
l
l
a
t
i
o
n
f
r
e
q
u
e
n
c
y
o
f
X
C
I
N
o
r
t
h
e
o
n
-
c
h
i
p
o
s
c
i
l
l
a
t
o
r
.
Baud rate generator
Frequency division
ratio 1/(n+1)
Clock control circuit
T
r
a
n
s
m
i
t
b
u
f
Address 0018
16
f
e
r
r
e
g
i
s
t
e
r
Date bus
T
r
a
n
s
m
i
t
s
h
i
f
t
r
e
g
i
s
t
e
r
T
c
r
o
a
m
n
s
p
m
l
e
i
i
t
o
s
n
h
i
f
f
l
t
a
r
g
e
g
(
T
i
s
S
t
e
C
r
)
s
h
i
f
t
t
T
r
a
n
s
m
i
t
b
u
f
f
e
r
e
m
p
t
y
f
l
a
g
(
T
B
E
)
Transmit interrupt request (TI)
A
d
d
r
e
s
s
0
0
1
9
1
6
B
s
R
e
G
e
c
t
i
o
o
u
n
n
b
t
i
s
t
o
u
r
c
e
l
c
Serial I/O synchronous
clock selection bit
P4
6
/S
CLK
P
c
4
7
/
h
r
o
S
R
n
o
D
s
Y
/
o
S
O
u
t
p
U
t
)
T
f
(
X
I
N
)
f(SUB) in low-speed mode
(
S
y
n
u
u
(
Asynchronous output
)
S
s
e
e
r
l
e
i
a
c
l
t
i
I
o
/
O
n
b
m
i
o
(
d
S
e
I
O
t
M
)
Shift clock
(Note)
T
T
S
B
C
E
=
=
0
1
TSC=1
ST
D
1
D
1
S
T
SP
D
1
D
7
T
S
C
=
1
S
P
D
1
D
7
D
0
T
B
E
=
0
T
B
E
=
0
T
B
E
=
0
T
B
E
=
0
D
1
D
6
D
7
T
T
B
S
E
C
=
=
1
0
TSC=0
TBE=1
TSC=0
D
0
T
T
B
S
E
C
=
=
1
0
P4
6
/S
CLK
P
4
5
/
T
X
D
P
u
4
7
/
s
S
O
u
t
U
u
T
t
)
(
s
y
n
c
h
r
o
n
o
o
p
(
Asynchronous output
)
s
y
n
c
o
h
u
r
t
o
p
n
u
o
t
u
s
s
e
l
s
e
e
c
r
t
i
i
a
o
l
n
I
/
b
O
i
t
T
r
a
n
w
s
m
r
i
i
e
t
b
s
u
i
g
f
n
f
e
a
r
l
t
S
e
r
i
s
a
l
I
l
/
O
c
i
m
o
o
n
d
b
e
i
t
e
e
t
A
s
y
n
c
h
r
o
n
o
u
s
t
r
a
n
s
m
i
t
A
s
y
n
c
h
r
o
n
o
u
s
t
r
a
n
s
m
i
t
S
y
n
c
h
r
o
n
o
u
s
t
r
a
n
s
m
i
t
Synchronous
transmit
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