參數(shù)資料
型號(hào)： M38227M8A-XXXHP
元件分類(lèi)： 微控制器/微處理器
英文描述： 8-BIT, MROM, 5 MHz, MICROCONTROLLER, PQFP80
封裝： 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LQFP-80
文件頁(yè)數(shù)： 49/58頁(yè)
文件大小： 733K
代理商： M38227M8A-XXXHP
53
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
3822 Group (A ver.)
MITSUBISHI MICROCOMPUTERS
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Som
e param
etric
lim
its are
subject
to change.
(VCC = 4.0 to 5.5 V, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)
Note: When bit 6 of address 001A16 is “1” (clock synchronous).
Divide this value by four when bit 6 of address 001A16 is “0” (UART).
Table 18 Timing requirements 1 (A version)
Note: When bit 6 of address 001A16 is “1” (clock synchronous).
Divide this value by four when bit 6 of address 001A16 is “0” (UART).
(VCC = 1.8 to 4.0 V, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)
Table 19 Timing requirements 2 (A version)
2
1000/(4 VCC–8)
100
45
40
45
40
1000/(2 VCC–4)
200
105
85
105
85
80
800
370
220
100
Reset input “L” pulse width
Main clock input cycle time (XIN input)
Main clock input “H” pulse width
Main clock input “L” pulse width
CNTR0, CNTR1 input cycle time
CNTR0, CNTR1 input “H” pulse width
CNTR0, CNTR1 input “L” pulse width
INT0 to INT3 input “H” pulse width
INT0 to INT3 input “L” pulse width
Serial I/O clock input cycle time (Note)
Serial I/O clock input “H” pulse width (Note)
Serial I/O clock input “L” pulse width (Note)
Serial I/O input set up time
Serial I/O input hold time
tw(RESET)
tc(XIN)
twH(XIN)
twL(XIN)
tc(CNTR)
twH(CNTR)
twL(CNTR)
twH(INT)
twL(INT)
tc(SCLK)
twH(SCLK)
twL(SCLK)
tsu(RXD–SCLK)
th(SCLK–RXD)
Symbol
Parameter
Limits
Min.
s
ns
Unit
Typ.
Max.
4.0
≤ Vcc < 4.5 V
4.5
≤ Vcc ≤ 5.5 V
4.0
≤ Vcc < 4.5 V
4.5
≤ Vcc ≤ 5.5 V
4.0
≤ Vcc < 4.5 V
4.5
≤ Vcc ≤ 5.5 V
4.0
≤ Vcc < 4.5 V
4.5
≤ Vcc ≤ 5.5 V
4.0
≤ Vcc < 4.5 V
4.5
≤ Vcc ≤ 5.5 V
4.0
≤ Vcc < 4.5 V
4.5
≤ Vcc ≤ 5.5 V
2
125
1000/(10 VCC–12)
50
70
50
70
1000/VCC
1000/(5 VCC–8)
tc(CNTR)/2–20
230
2000
950
400
200
Reset input “L” pulse width
Main clock input cycle time (XIN input)
Main clock input “H” pulse width
Main clock input “L” pulse width
CNTR0, CNTR1 input cycle time
CNTR0, CNTR1 input “H” pulse width
CNTR0, CNTR1 input “L” pulse width
INT0 to INT3 input “H” pulse width
INT0 to INT3 input “L” pulse width
Serial I/O clock input cycle time (Note)
Serial I/O clock input “H” pulse width (Note)
Serial I/O clock input “L” pulse width (Note)
Serial I/O input set up time
Serial I/O input hold time
tw(RESET)
tc(XIN)
twH(XIN)
twL(XIN)
tc(CNTR)
twH(CNTR)
twL(CNTR)
twH(INT)
twL(INT)
tc(SCLK)
twH(SCLK)
twL(SCLK)
tsu(RXD–SCLK)
th(SCLK–RXD)
Symbol
Parameter
Limits
Min.
s
ns
Unit
Typ.
Max.
2.0
≤ Vcc ≤ 4.0 V
Vcc
< 2.0 V
2.0
≤ Vcc ≤ 4.0 V
Vcc
< 2.0 V
2.0
≤ Vcc ≤ 4.0 V
Vcc
< 2.0 V
2.0
≤ Vcc ≤ 4.0 V
Vcc
< 2.0 V
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