2.3 Timer X and timer Y
APPLICATION
2–53
3820 GROUP USER’S MANUAL
Fig. 2.3.13 Structure of timer X latch
(3) Timer X latch and timer X counter (TXL and TXH)
The timer X latch (referred as “the X latch”) and the timer X counter (referred as “the X counter”)
consist of 16 bits in a combination of high-order (address 0021
16
) and low-order (address 0020
16
).
The X latch and the X counter are allocated at the same address. To access the X latch and the X
counter, access both the timer X (low-order) and the timer X (high-order).
I
Read
When the timer X (high-order) and the timer X (low-order) are read out, the value of the X counter
(count value) are read out. Read both registers in the order of the timer X (high-order) and the timer
X (low-order).
Do not write any value to the timer X (high-order) and the timer X (low-order) before the timer X (low-
order) has been read out. In this case, timer X will not operate normally.
I
Write
When a value is written to the timer X (low-order) and the timer X (high-order), the value is set in the
X latch and the X counter at the same time. Writing to the X latch only can be selected by the timer
X write control bit (refer to
“2.3.3 Related registers, (5) Timer X mode register”
). Write the values
to both registers in the order of the timer X (low-order) and the timer X (high-order).
Do not read timer X (low-order) and the timer X (high-order) before the timer X (high-order) has been
written. In this case, timer X will not operate normally.
G
Timer X latch
The X latch is a register which holds the value to be transferred (reloaded) automatically to the X
counter as the initial value of the X counter at the X counter underflow. Figure 2.3.13 shows the
structure of the timer X latch.
The contents of the X latch cannot be read out.
Note :
Write both registers in the order of TXL and TXH.
b7b6 b5b4b3 b2b1b0
Timer X (high-order, low-order) (TXH, TXL) [Address 21
16
, 20
16
]
B
Functions
At reset R W
1
Timer X (high-order, low-order)
0
to
7
Set “0000
16
to FFFF
16
” as timer X count value.
Write high-order byte of setting value to TXH,
and low-order byte to TXL, respectively.
The values of TXH and TXL are set to the
respective X latches and transferred auto-
matically to the respective X counters at the
X counter underflow.
G
Timer X latch
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