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參數(shù)資料
| 型號： | M381L5623MTN |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | DDR SDRAM Unbuffered Module |
| 中文描述： | DDR SDRAM的緩沖模塊 |
| 文件頁數(shù)： | 3/17頁 |
| 文件大小： | 250K |
| 代理商： | M381L5623MTN |
Preliminary
DDR SDRAM
2GB Unbuffered DIMM
Rev. 0.0 April 2004
SAMSUNG ELECTRONICS CO., Ltd. reserves the right to change products and specifications without notice.
Ordering Information
Operating Frequencies
Part Number
Density
2GB
2GB
Organization
128M x 64
128M x 72
Component Composition
128Mx8 (K4H1G0838M) * 16EA
128Mx8 (K4H1G0838M) * 18EA
Height
1,250mil
1,250mil
M368L5623MTN-C(L)B3/A2/B0
M381L5623MTM-C(L)B3/A2/B0
B3(DDR333@CL=2.5)
133MHz
166MHz
2.5-3-3
A2(DDR266@CL=2)
133MHz
133MHz
2-3-3
B0(DDR266@CL=2.5)
100MHz
133MHz
2.5-3-3
Speed @CL2
Speed @CL2.5
CL-tRCD-tRP
Feature
Power supply : Vdd: 2.5V
±
0.2V, Vddq: 2.5V
±
0.2V
Double-data-rate architecture; two data transfers per clock cycle
Bidirectional data strobe [DQ] (x4,x8) & [L(U)DQS] (x16)
Differential clock inputs(CK and CK)
DLL aligns DQ and DQS transition with CK transition
Programmable Read latency 2, 2.5 (clock)
Programmable Burst length (2, 4, 8)
Programmable Burst type (sequential & interleave)
Edge aligned data output, center aligned data input
Auto & Self refresh, 7.8us refresh interval(8K/64ms refresh)
Serial presence detect with EEPROM
PCB : Height 1,250 (mil) & double sided
SSTL_2 Interface
184Pin Unbuffered DIMM based on 1Gb M-die (x8)
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