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參數(shù)資料
| 型號： | M381L3223ETM-CC5 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 184pin Unbuffered Module based on 256Mb E-die 64/72-bit ECC/Non ECC |
| 中文描述： | 184pin緩沖模塊，基于256Mb電子模具64/72-bit ECC的/非ECC |
| 文件頁數(shù)： | 3/19頁 |
| 文件大?。?/td> | 287K |
| 代理商： | M381L3223ETM-CC5 |
DDR SDRAM
Revision 1.0 December, 2003
256MB, 512MB DDR466 Unbuffered DIMM
Note : 1. VID is the magnitude of the difference between the input level on CK and the input on CK.
2. The value of VIX is expected to equal 0.5*VDDQ of the transmitting device and must track variations in the DC level of the same.
3. These parameters should be tested at the pim on actual components and may be checked at either the pin or the pad in
simulation. the AC and DC input specificatims are refation to a Vref envelope that has been bandwidth limited 20MHz.
Output Load Circuit (SSTL_2)
Output
Z0=50
CLOAD=30pF
VREF
=0.5*VDDQ
RT=50
Vtt=0.5*VDDQ
AC Operating Conditions
Parameter/Condition
Symbol
Min
Max
Unit
Note
Input High (Logic 1) Voltage, DQ, DQS and DM signals
VIH(AC)
VREF + 0.31
V
Input Low (Logic 0) Voltage, DQ, DQS and DM signals.
VIL(AC)
VREF - 0.31
V
Input Differential Voltage, CK and CK inputs
VID(AC)
0.7
VDDQ+0.6
V
1
Input Crossing Point Voltage, CK and CK inputs
VIX(AC)
0.5*VDDQ-0.2
0.5*VDDQ+0.2
V
2
Input/Output Capacitance
(VDD=2.6V, VDDQ=2.6V, TA= 25
°C, f=1MHz)
Parameter
Symbol
M368L3223ETM
M381L3223ETM
Unit
Min
Max
Min
Max
Input capacitance(A0 ~ A12, BA0 ~ BA1,RAS,CAS,WE )
CIN1
49
575160
pF
Input capacitance(CKE0)
CIN2
42
50
44
53
pF
Input capacitance( CS0)
CIN3
42
50
44
53
pF
Input capacitance( CLK0, CLK1,CLK2)
CIN4
25
30
25
30
pF
Input capacitance(DM0~DM7, DM8(for ECC))
CIN5
6767
pF
Data & DQS input/output capacitance(DQ0~DQ63)
Cout1
6767
pF
Data input/output capacitance (CB0~CB7)
Cout2
-
6
7
pF
Parameter
Symbol
M368L6423ETM
M381L6423ETM
Unit
Min
Max
Min
Max
Input capacitance(A0 ~ A12, BA0 ~ BA1,RAS,CAS,WE )
CIN1
65816987
pF
Input capacitance(CKE0,CKE1)
CIN2
42
50
44
53
pF
Input capacitance( CS0, CS1)
CIN3
42
50
44
53
pF
Input capacitance( CLK0, CLK1,CLK2)
CIN4
28
34
28
34
pF
Input capacitance(DM0~DM7, DM8(for ECC))
CIN5
10
12
10
12
pF
Data & DQS input/output capacitance(DQ0~DQ63)
Cout1
10
12
10
12
pF
Data input/output capacitance (CB0~CB7)
Cout2
-
10
12
pF
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