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參數(shù)資料
| 型號(hào)： | M38198M7-XXXFP |
| 廠(chǎng)商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機(jī) |
| 文件頁(yè)數(shù)： | 24/60頁(yè) |
| 文件大小： | 664K |
| 代理商： | M38198M7-XXXFP |
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24
3819 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
b0
Internal synchronous clock selection bits
b2 b1 b0
0 0 0 : f(X
IN
)/8 or f(X
CIN
)/8
0 0 1 : f(X
IN
)/16 or f(X
CIN
)/16
0 1 0 : f(X
IN
)/32 or f(X
CIN
)/32
0 1 1 : f(X
IN
)/64 or f(X
CIN
)/64
1 1 0 : f(X
IN
)/128 or f(X
CIN
)/128
1 1 1 : f(X
IN
)/256 or f(X
CIN
)/256
Serial I/O1 port selection bit (P6
5
, P6
6
, and P6
7
8
)
0 : I/O port
1 : S
OUT1
,S
CLK11
,and S
CLK12
8
output pins
S
RDY1
output selection bit (P6
7
)
0 : I/O port
1 : S
RDY1
/CS
8
output pin (Note)
Transfer direction selection bit
0 : LSB first
1 : MSB first
Synchronous clock selection bit
0 : External clock
1 : Internal clock
P6
5
/S
OUT1
P-channel output disable bit
0 : CMOS output (in output mode)
1 : N-channel open-drain output
(in output mode)
b7
Serial I/O1 control register
(SIO1CON(SC1) : address 0019
16
)
b0
Internal synchronous clock selection bits
b2 b1 b0
0 0 0 : f(X
IN
)/8 or f(X
CIN
)/8
0 0 1 : f(X
IN
)/16 or f(X
CIN
)/16
0 1 0 : f(X
IN
)/32 or f(X
CIN
)/32
0 1 1 : f(X
IN
)/64 or f(X
CIN
)/64
1 1 0 : f(X
IN
)/128 or f(X
CIN
)/128
1 1 1 : f(X
IN
)/256 or f(X
CIN
)/256
Serial I/O2 port selection bit (P5
1
, and P5
2
)
0 : I/O port
1 : S
OUT2
and S
CLK2
output pins
S
RDY2
output selection bit (P5
3
)
0 : I/O port
1 : S
RDY2
output pin
Transfer direction selection bit
0 : LSB first
1 : MSB first
Synchronous clock selection bit
0 : External clock
1 : Internal clock
P5
1
/S
OUT2
P-channel output disable bit
0 : CMOS output (in output mode)
1 : N-channel open-drain output
(in output mode)
b7
Serial I/O2 control register
(SIO2CON(SC2) : address 001D
16
)
b0
Internal synchronous clock selection bits
b2 b1 b0
0 0 0 : f(X
IN
)/8 or f(X
CIN
)/8
0 0 1 : f(X
IN
)/16 or f(X
CIN
)/16
0 1 0 : f(X
IN
)/32 or f(X
CIN
)/32
0 1 1 : f(X
IN
)/64 or f(X
CIN
)/64
1 1 0 : f(X
IN
)/128 or f(X
CIN
)/128
1 1 1 : f(X
IN
)/256 or f(X
CIN
)/256
Serial I/O3 port selection bit (P5
5
and P5
6
)
0 : I/O port
1 : S
OUT3
and S
CLK3
output pins
S
RDY3
output selection bit (P5
7
)
0 : I/O port
1 : S
RDY3
and S
CLK3
output pins
Transfer direction selection bit
0 : LSB first
1 : MSB first
Synchronous clock selection bit
0 : External clock
1 : Internal clock
P5
5
/S
OUT3
P-channel output disable bit
0 : CMOS output (in output mode)
1 : N-channel open-drain output
(in output mode)
b7
Serial I/O3 control register
(SIO3CON(SC3) : address 001E
16
)
8
: Valid only in serial I/O automatic transfer mode.
Note:
When the external clock is selected in the serial I/O1 automatic transfer mode, the S
RDY1
signal pin becomes the CS signal input pin.
Fig. GA-2 Structure of serial I/O control registers
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