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3. APPENDIX
MITSUBISHI MICROCOMPUTER
3819 Group
3.3 Control registers
3819 Group USER’S MANUAL
Fig. 3.3.3 Structure of Serial I/O automatic transfer data pointer
Fig. 3.3.4 Structure of Serial I/O 1 control register
When an external clock is selected in the serial I/O 1 automatic transfer
mode, the S RDY1 signal pin is used as the CS signal input pin.
Serial I/O automatic transfer data pointer
b7 b6 b5 b4 b3 b2 b1 b0
B
Function
At reset
RW
0
1
2
3
4
6
7
0
Serial I/O automatic transfer data pointer (SIODP) [Address:1816]
0
Nothing is allocated for these bits. These are write disabled bits.
When these bits are read out, the values are "0."
Indicate an address of Serial I/O automatic transfer RAM.
?
0
5
!
Serial I/O 1 control register
b7 b6 b5 b4 b3 b2 b1 b0
B
Function
At reset
RW
0
1
2
3
4
5
6
7
0
Serial I/O 1 control register (SIO1CON) [Address:1916]
Name
Internal synchronous clock
selection bits
Synchronous clock selection
bit
000 : f(XIN)/8 or f(XCIN)/8
001 : f(XIN)/16 or f(XCIN)/16
010 : f(XIN)/32 or f(XCIN)/32
011 : f(XIN)/64 or f(XCIN)/64
110 : f(XIN)/128 or f(XCIN)/128
111 : f(XIN)/256 or f(XCIN)/256
0 : External clock
1 : Internal clock
P65/SOUT1 P-channel output
disable bit
b2 b1b0
Serial I/O 1 port selection bit
(P65,P66,P67 )
T
Transfer direction selection
bit
0 : LSB first
1 : MSB first
SRDY1 output selection bit
(P67)
0 : I/O port
1 : SRDY1/CS signal pin
( Note)
0 : I/O port
1 : SOUT1, SCLK11, SCLK12 signal pins
T
Valid only in the Serial I/O automatic transfer mode
0 : CMOS output (in output mode)
1 : N-channel open-drain output
(in output mode)
Note :