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| 型號： | M38079MF-164FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機(jī) |
| 文件頁數(shù)： | 49/74頁 |
| 文件大小： | 1182K |
| 代理商： | M38079MF-164FP |
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49
3807 Group
MITSUBISHI MICROCOMPUTERS
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
00
16
00
16
00
16
00
16
00
16
FF
16
FF
16
FF
16
FF
16
00
16
00
16
00
16
00
16
00
16
00
16
FFFC
16
contents
FF
16
0026
16
0027
16
0028
16
0029
16
002A
16
002B
16
002C
16
002D
16
002E
16
002F
16
0030
16
0031
16
0032
16
0033
16
0034
16
0036
16
0037
16
0038
16
0039
16
003A
16
003B
16
003C
16
003D
16
003E
16
003F
16
(PS)
(PC
H
)
(PC
L
)
* The initial values depend on level of port CNV
SS.
X: Not fixed
Since the initial values for other than above mentioned registers and RAM contents are indefinite at reset, they must be set.
Address Register contents
Address Register contents
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
FF
16
FF
16
FF
16
FF
16
FF
16
01
16
00
16
0000
16
0001
16
0002
16
0003
16
0004
16
0005
16
0006
16
0007
16
0008
16
0009
16
000A
16
000B
16
000C
16
000D
16
000E
16
000F
16
0010
16
0011
16
0014
16
0015
16
0016
16
0017
16
0019
16
001A
16
001B
16
001D
16
001E
16
0020
16
0021
16
0022
16
0023
16
0024
16
0025
16
Timer X (low-order)
Timer 2
Port P0
Port P0 direction register
Port P1
Port P1 direction register
Port P2
Port P2 direction register
Port P3
Port P3 direction register
Port P4
Port P4 direction register
Port P5
Port P5 direction register
Port P6
Port P6 direction register
Port P7
Port P7 direction register
Port P8
Port P8 direction register
Timer XY control register
Port P2P3 control register
Pull-up control register
Watchdog timer control register
Serial I/O1 status register
Serial I/O1 control register
UART control register
Serial I/O2 control register 1
Serial I/O2 control register 2
Timer X (high-order)
Timer Y (low-order)
Timer Y (high-order)
Timer 1
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(12)
(13)
(14)
(15)
(16)
(17)
(18)
(19)
(20)
(21)
(22)
(23)
(24)
(25)
(26)
(27)
(28)
(29)
(30)
(31)
(32)
(33)
(34)
(35)
(36)
(37)
(38)
(39)
(40)
(41)
(42)
(43)
(44)
(45)
(46)
(47)
(48)
(49)
(50)
(51)
(52)
(53)
(54)
(55)
(56)
(57)
(58)
(59)
(60)Program counter
Timer 3
Interrupt edge selection register
Timer X mode register
Timer Y mode register
Timer 123 mode register
Real time port register 0—7
Real time port control register 0
Real time port control register 1
R/W pointer
Output pointer
Real time port control register 2
R/W pointer
Output pointer
Real time port control register 3
Timer A (low-order)
Timer A (high-order)
Timer B (low-order)
Timer B (high-order)
D-A control register
A-D control register
D-A1 conversion register
D-A2 conversion register
D-A3 conversion register
D-A4 conversion register
CPU mode register
Interrupt request register 1
Interrupt request register 2
Interrupt control register 1
Interrupt control register 2
Processor status register
1
0 0 0
0
00
16
1 1 1
00
16
00
16
00
16
FFFD
16
contents
1
0 1 0 0 1 0
0
*
0 0 0 1 0 0
0
0
1 1 1
1 1 1
1 1 1
1
0 0 0
0
1 0 0 1 0 0
0
0
0 0 0 0 0 0
1
1
0 0 0 0 0
0
0
*
0 0 1 1 1 1
1
1
1 0 0 0 0 0
0
0
1 1 1 0 0 0
0
0
0 0 0 0 0 1
1
1
Fig. 54. Internal status at reset
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