參數(shù)資料
      型號: M38067MCD-158FP
      廠商: Mitsubishi Electric Corporation
      英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
      中文描述: 單芯片8位CMOS微機
      文件頁數(shù): 50/57頁
      文件大?。?/td> 833K
      代理商: M38067MCD-158FP
      50
      SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
      Serial I/O1 clock output “H” pulse width
      Serial I/O1 clock output “L” pulse width
      Serial I/O1 output delay time (Note 1)
      Serial I/O1 output valid time (Note 1)
      Serial I/O1 clock output rising time
      Serial I/O1 clock output falling time
      Serial I/O2 clock output “H” pulse width
      Serial I/O2 clock output “L” pulse width
      Serial I/O2 output delay time
      Serial I/O2 output valid time
      Serial I/O2 clock output falling time
      CMOS output rising time (Note 2)
      CMOS output falling time (Note 2)
      140
      30
      30
      200
      30
      30
      30
      Symbol
      Parameter
      Limits
      Typ.
      Min.
      ns
      ns
      ns
      ns
      ns
      ns
      ns
      ns
      ns
      ns
      ns
      ns
      ns
      Unit
      SWITCHING CHARACTERISTICS 1 (High-speed version)
      (V
      CC
      = 4.0 to 5.5 V, V
      SS =
      0 V, T
      a
      = –20 to 85
      °
      C, unless otherwise noted)
      t
      c(S
      CLK1
      )
      /2–30
      t
      c(S
      CLK1
      )
      /2–30
      –30
      t
      c(S
      CLK2
      )
      /2–160
      t
      c(S
      CLK2
      )
      /2–160
      0
      10
      10
      Max.
      t
      wH(S
      CLK1
      )
      t
      wL(S
      CLK1
      )
      t
      d(S
      CLK1
      –T
      X
      D)
      t
      v(S
      CLK1
      –T
      X
      D)
      t
      r(S
      CLK1
      )
      t
      f(S
      CLK1
      )
      t
      wH(S
      CLK2
      )
      t
      wL(S
      CLK2
      )
      t
      d(S
      CLK2
      –S
      OUT2
      )
      t
      v(S
      CLK2
      –S
      OUT2
      )
      t
      f(S
      CLK2
      )
      t
      r(CMOS)
      t
      f(CMOS)
      Test conditions
      Fig. 32
      Fig. 33
      Fig. 32
      Note1:
      When the P4
      5
      /T
      X
      D P-channel output disable bit of the UART control register (bit 4 of address 001B
      16
      ) is “0”.
      2:
      X
      OUT
      pin is excluded.
      Serial I/O1 clock output “H” pulse width
      Serial I/O1 clock output “L” pulse width
      Serial I/O1 output delay time (Note 1)
      Serial I/O1 output valid time (Note 1)
      Serial I/O1 clock output rising time
      Serial I/O1 clock output falling time
      Serial I/O2 clock output “H” pulse width
      Serial I/O2 clock output “L” pulse width
      Serial I/O2 output delay time
      Serial I/O2 output valid time
      Serial I/O2 clock output falling time
      CMOS output rising time (Note 2)
      CMOS output falling time (Note 2)
      350
      50
      50
      400
      50
      50
      50
      Symbol
      Parameter
      Limits
      Typ.
      Min.
      ns
      ns
      ns
      ns
      ns
      ns
      ns
      ns
      ns
      ns
      ns
      ns
      ns
      Unit
      SWITCHING CHARACTERISTICS 2 (High-speed version)
      (V
      CC
      = 2.7 to 4.0 V, V
      SS =
      0 V, T
      a
      = –20 to 85
      °
      C, unless otherwise noted)
      t
      c(S
      CLK1
      )
      /2–50
      t
      c(S
      CLK1
      )
      /2–50
      –30
      t
      c(S
      CLK2
      )
      /2–240
      t
      c(S
      CLK2
      )
      /2–240
      0
      20
      20
      Max.
      t
      wH(S
      CLK1
      )
      t
      wL(S
      CLK1
      )
      t
      d(S
      CLK1
      –T
      X
      D)
      t
      v(S
      CLK1
      –T
      X
      D)
      t
      r(S
      CLK1
      )
      t
      f(S
      CLK1
      )
      t
      wH(S
      CLK2
      )
      t
      wL(S
      CLK2
      )
      t
      d(S
      CLK2
      –S
      OUT2
      )
      t
      v(S
      CLK2
      –S
      OUT2
      )
      t
      f(S
      CLK2
      )
      t
      r(CMOS)
      t
      f(CMOS)
      Test conditions
      Fig. 32
      Fig. 33
      Fig. 32
      Note 1:
      When the P4
      5
      /T
      X
      D P-channel output disable bit of the UART control register (bit 4 of address 001B
      16
      ) is “0”.
      2:
      X
      OUT
      pin is excluded.
      MITSUBISHI MICROCOMPUTERS
      3806 Group
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