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參數(shù)資料
| 型號： | M38062M4-096FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機 |
| 文件頁數(shù)： | 25/57頁 |
| 文件大?。?/td> | 833K |
| 代理商： | M38062M4-096FP |
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25
MITSUBISHI MICROCOMPUTERS
3806 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
A-D Converter
The functional blocks of the A-D converter are described below.
[A-D conversion register]
The A-D conversion register is a read-only register that stores the
result of an A-D conversion. When reading this register during an
A-D conversion, the previous conversion result is read.
[AD/DA control register]
The AD/DA control register controls the A-D conversion process.
Bits 0 to 2 select a specific analog input pin. Bit 3 signals the
completion of an A-D conversion. The value of this bit remains at
“0” during an A-D conversion, and changes to “1” when an A-D
conversion ends. Writing “0” to this bit starts the A-D conversion.
Bits 6 and 7 are used to control the output of the D-A converter.
[Comparison voltage generator]
The comparison voltage generator divides the voltage between
AV
SS
and V
REF
into 256, and outputs the divided voltages.
[Channel selector]
The channel selector selects one of the ports P6
0
/AN
0
to P6
7
/AN
7
,
and inputs the voltage to the comparator.
Fig.18 Structure of AD/DA control register
Fig. 19 Block diagram of A-D converter
[Comparator and Control circuit]
The comparator and control circuit compares an analog input volt-
age with the comparison voltage, then stores the result in the A-D
conversion register. When an A-D conversion is complete, the
control circuit sets the AD conversion completion bit and the AD
interrupt request bit to “1”.
Note that the comparator is constructed linked to a capacitor, so
set f(X
IN
) to 500 kHz or more during an A-D conversion.
AD/DA control register
(ADCON : address 0034
16
)
Analog input pin selection bits
b2 b1 b0
0 0 0: P6
0
/AN
0
0 0 1: P6
1
/AN
1
0 1 0: P6
2
/AN
2
0 1 1: P6
3
/AN
3
1 0 0: P6
4
/AN
4
1 0 1: P6
5
/AN
5
1 1 0: P6
6
/AN
6
1 1 1: P6
7
/AN
7
AD conversion completion bit
0: Conversion in progress
1: Conversion completed
Not used (return "0" When read)
DA
output enable bit
0: DA
1
output disabled
1: DA
1
output enabled
DA
output enable bit
0: DA
2
output disabled
1: DA
2
output enabled
b7
b0
C
A-D control circuit
A-D conversion register
8
Resistor ladder
V
REF
AV
SS
Comparator
A-D interrupt request
b7
b0
3
P6
0
/AN
0
P6
1
/AN
1
P6
2
/AN
2
P6
3
/AN
3
P6
4
/AN
4
P6
5
/AN
5
P6
6
/AN
6
P6
7
/AN
7
Data bus
(Address 0035
16
)
AD/DA control register
(Address 0034
16
)
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