
3802 GROUP USER’S MANUAL
3-42
APPENDIX
3.5 List of registers
Fig. 3.5.18 Structure of A-D conversion register
Fig. 3.5.17 Structure of AD/DA control register
A-D conversion register
b7 b6 b5 b4 b3 b2 b1 b0
B
0
1
2
3
4
5
6
7
Function
At reset
R W
A-D conversion register (AD) [Address : 35
16
]
The read-only register which A-D conversion results are stored.
AD/DA control register
b7 b6 b5 b4 b3 b2 b1 b0
B
0
Function
At reset
R W
0
Name
Analog input pin selection bits
AD/DA control register (ADCON) [Address : 34
16
]
0
/AN
0
0 0 1 : P6
1
/AN
1
0 1 0 : P6
2
/AN
2
0 1 1 : P6
3
/AN
3
1 0 0 : P6
4
/AN
4
1 0 1 : P6
5
/AN
5
1 1 0 : P6
6
/AN
6
1 1 1 : P6
7
/AN
7
0 : Conversion in progress
1 : Conversion completed
b2 b1 b0
1
3
1
0
0
0
0 : DA
1
output disable
1 : DA
1
output enable
0 : DA
2
output disabled
1 : DA
2
output enabled
DA
1
output enable bit
6
0
7
0
0
Nothing is allocated for these bits. These are write disabled bits.
When these bits are read out, the values are “0.”
4
5
DA
2
output enable bit
2
AD conversion completion bit