- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄45039 > M38024M6-XXXFP 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP64 PDF資料下載
參數(shù)資料
| 型號(hào)： | M38024M6-XXXFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64 |
| 文件頁(yè)數(shù)： | 7/208頁(yè) |
| 文件大小： | 1967K |
| 代理商： | M38024M6-XXXFP |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)當(dāng)前第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)第184頁(yè)第185頁(yè)第186頁(yè)第187頁(yè)第188頁(yè)第189頁(yè)第190頁(yè)第191頁(yè)第192頁(yè)第193頁(yè)第194頁(yè)第195頁(yè)第196頁(yè)第197頁(yè)第198頁(yè)第199頁(yè)第200頁(yè)第201頁(yè)第202頁(yè)第203頁(yè)第204頁(yè)第205頁(yè)第206頁(yè)第207頁(yè)第208頁(yè)
2.3 Serial I/O
2-46
APPLICATION
3802 GROUP USER’S MANUAL
Control in the slave unit
After a setting of the related registers is completed as shown in Figure 2.3.33, the slave unit becomes the
state which is received a synchronizing clock at all times, and the Serial I/O1 receive interrupt request bit
is set to “1” every time an 8-bit synchronous clock is received.
By the serial I/O1 receive interrupt processing routine, the data to be transmitted next is written to the
Transmit buffer register after received data is read out.
However, if no serial I/O1 receive interrupt occurs for more than a certain time (head adjustive time), the
following processing will be performed.
1. The first 1 byte data of the transmission data in the block is written into the Transmit buffer register.
2. The data to be received next is processed as the first 1 byte of the received data in the block.
Figure 2.3.35 shows the control in the slave unit using a serial I/O1 receive interrupt and any timer interrupt
(for head adjustive).
Fig. 2.3.35 Control in the slave unit
Write a transmission data
Read a reception data
N
Within a block transfer period?
Y
A received byte counter
≥ 8?
N
RTI
Write any data (FF16)
A received byte counter +1
Heading adjustive
counter
Initialized
value (Note 3)
Serial I/O1 receive interrupt
processing routine
Timer interrupt processing
routine
Heading adjustive counter – 1
N
Heading adjustive
counter = 0?
Y
RTI
Write the first transmission data
(first byte) in a block
A received byte counter
0
Check the received byte
counter to judge if a block
has been transfered.
In this example, set the value which is equal to the
heading adjustive time divided by the timer interrupt
cycle as the initialized value of the heading adjustive
counter.
For example: When the heading adjustive time is 8 ms
and the timer interrupt cycle is 1 ms, set
8 as the initialized value.
3:
q
CLT (Note 1)
CLD (Note 2)
Push register to stack
Push the register used in
the interrupt processing
routine into the stack.
q
CLT (Note 1)
CLD (Note 2)
Push register to stack
Push the register used in
the interrupt processing
routine into the stack.
q
Pop registers
Pop registers which is
pushed to stack.
q
Pop registers
Pop registers which is
pushed to stack.
q
Notes 1: When using the Index X mode flag (T).
2: When using the Decimal mode flag (D).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M38027E8DXXXFP | 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PQFP64 |
| M38024M6-XXXSP | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP64 |
| M38027E8SP | 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PDIP64 |
| M38027E8DFP | 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PQFP64 |
| M38022M2-XXXSP | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP64 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M38027E8FP | 制造商:Renesas Electronics Corporation 功能描述:M16C FLASH 256K/20K, 24MHZ,DMA,I2C,IEBU - Trays |
| M38027E8FP#U0 | 制造商:Renesas Electronics Corporation 功能描述:M16C FLASH 256K/20K, 24MHZ,DMA,I2C,IEBU -LEAD FREE VERSION - Trays |
| M38027E8FS | 制造商:Renesas Electronics Corporation 功能描述:MCU 8BIT 740 CISC 32KB EPROM 3.3V/5V 64CLCC - Bulk |
| M38027E8SS | 制造商:Renesas Electronics Corporation 功能描述:MCU 8BIT 740 CISC 32KB EPROM 3.3V/5V 64PIN SDIP - Bulk |
| M3802-BLACK-100 | 制造商:Alpha Wire 功能描述: |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。