- 您現在的位置：買賣IC網 > PDF目錄370850 > M38000S6-XXXFP (Mitsubishi Electric Corporation) 16 Characters x 2 Lines, 5x7 Dot Matrix Character and Cursor PDF資料下載
參數資料
| 型號： | M38000S6-XXXFP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 16 Characters x 2 Lines, 5x7 Dot Matrix Character and Cursor |
| 中文描述： | 8位單片機 |
| 文件頁數： | 26/173頁 |
| 文件大?。?/td> | 4203K |
| 代理商： | M38000S6-XXXFP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁當前第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁
1-12
HARDWARE
3800 GROUP USER’S MANUAL
Processor status register (PS)
The processor status register is an 8-bit register consisting of flags
which indicate the status of the processor after an arithmetic op-
eration. Branch operations can be performed by testing the Carry
(C) flag, Zero (Z) flag, Overflow (V) flag, or the Negative (N) flag.
In decimal mode, the Z, V, N flags are not valid.
After reset, the Interrupt disable (I) flag is set to “1”, but all other
flags are undefined. Since the Index X mode (T) and Decimal
mode (D) flags directly affect arithmetic operations, they should be
initialized in the beginning of a program.
(1) Carry flag (C)
The C flag contains a carry or borrow generated by the arith-
metic logic unit (ALU) immediately after an arithmetic opera-
tion. It can also be changed by a shift or rotate instruction.
(2) Zero flag (Z)
The Z flag is set if the result of an immediate arithmetic op-
eration or a data transfer is “0”, and cleared if the result is
anything other than “0”.
(3) Interrupt disable flag (I)
The I flag disables all interrupts except for the interrupt gener-
ated by the BRK instruction.
Interrupts are disabled when the I flag is “1”.
When an interrupt occurs, this flag is automatically set to “1”
to prevent other interrupts from interfering until the current in-
terrupt is serviced.
(4) Decimal mode flag (D)
The D flag determines whether additions and subtractions are
executed in binary or decimal. Binary arithmetic is executed
when this flag is “0”; decimal arithmetic is executed when it is
“1”. Decimal correction is automatic in decimal mode. Only
the ADC and SBC instructions can be used for decimal arith-
metic.
(5) Break flag (B)
The B flag is used to indicate that the current interrupt was
generated by the BRK instruction. The BRK flag in the pro-
cessor status register is always “0”. When the BRK instruc-
tion is used to generate an interrupt, the processor status
register is pushed onto the stack with the break flag set to “1”.
The saved processor status is the only place where the break
flag is ever set.
(6) Index X mode flag (T)
When the T flag is “0”, arithmetic operations are performed
between accumulator and memory, e.g. the results of an op-
eration between two memory locations is stored in the accu-
mulator. When the T flag is “1”, direct arithmetic operations
and direct data transfers are enabled between memory loca-
tions, i.e. between memory and memory, memory and I/O,
and I/O and I/O. In this case, the result of an arithmetic op-
eration performed on data in memory location 1 and memory
location 2 is stored in memory location 1. The address of
memory location 1 is specified by index register X, and the
address of memory location 2 is specified by normal address-
ing modes.
(7) Overflow flag (V)
The V flag is used during the addition or subtraction of one
byte of signed data. It is set if the result exceeds + 127 to
–128. When the BIT instruction is executed, bit 6 of the
memory location operated on by the BIT instruction is stored
in the overflow flag.
(8) Negative flag (N)
The N flag is set if the result of an arithmetic operation or data
transfer is negative. When the BIT instruction is executed, bit
7 of the memory location operated on by the BIT instruction is
stored in the negative flag.
FUNCTIONAL DESCRIPTION
Table 5. Set and clear instructions of each bit of processor status register
Set instruction
Clear instruction
C flag
SEC
CLC
Z flag
—
—
I flag
SEI
CLI
D flag
SED
CLD
B flag
—
—
T flag
SET
CLT
V flag
—
CLV
N flag
—
—
相關PDF資料 |
PDF描述 |
|---|---|
| M38000S6-XXXFS | 16 Characters x 2 Lines, 5x7 Dot Matrix Character and Cursor |
| M38000S8-XXXFP | 16 Characters x 2 Lines, 5x7 Dot Matrix Character and Cursor |
| M38001E7-XXXFP | 1 watt dc-dc converters |
| M38001E7-XXXFS | POT 2K OHM 1/4W CER 4MM SQ VERT ADJ SMD |
| M38001M4-XXXFP | 1 watt dc-dc converters |
相關代理商/技術參數 |
參數描述 |
|---|---|
| M38000S6-XXXFS | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:8-BIT SINGLE-CHIP MICROCOMPUTER |
| M38000S6-XXXHP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:8-BIT SINGLE-CHIP MICROCOMPUTER |
| M38000S6-XXXSP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:8-BIT SINGLE-CHIP MICROCOMPUTER |
| M38000S6-XXXSS | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:8-BIT SINGLE-CHIP MICROCOMPUTER |
| M38000S7-DXXXSP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:8-BIT SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 38000 SERIES |
發(fā)布緊急采購，3分鐘左右您將得到回復。